IGLOO Low Power Flash FPGAs
Revision 23
2-71
Table 2-119 1.5 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.4 V
Applicable to Standard Banks
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
0.97
5.88
0.18
1.14
0.66
6.00
5.45
2.00
1.94
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values. Table 2-120 1.5 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.4 V
Applicable to Standard Banks
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
0.97
2.51
0.18
1.14
0.66
2.56
2.21
1.99
2.03
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.