Fusion Family of Mixed Signal FPGAs
Revision 4
2-189
Table 2-117 2.5 V LVCMOS High Slew
Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 2.3 V
Applicable to Standard I/Os
Drive
Strength
Speed
Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
0.66
8.20
0.04
1.29
0.43
7.24
8.20
2.03
1.91
ns
–1
0.56
6.98
0.04
1.10
0.36
6.16
6.98
1.73
1.62
ns
–2
0.49
6.13
0.03
0.96
0.32
5.41
6.13
1.52
1.43
ns
4 mA
Std.
0.66
8.20
0.04
1.29
0.43
7.24
8.20
2.03
1.91
ns
–1
0.56
6.98
0.04
1.10
0.36
6.16
6.98
1.73
1.62
ns
–2
0.49
6.13
0.03
0.96
0.32
5.41
6.13
1.52
1.43
ns
6 mA
Std.
0.66
4.77
0.04
1.29
0.43
4.55
4.77
2.38
2.55
ns
–1
0.56
4.05
0.04
1.10
0.36
3.87
4.05
2.03
2.17
ns
–2
0.49
3.56
0.03
0.96
0.32
3.40
3.56
1.78
1.91
ns
8 mA
Std.
0.66
4.77
0.04
1.29
0.43
4.55
4.77
2.38
2.55
ns
–1
0.56
4.05
0.04
1.10
0.36
3.87
4.05
2.03
2.17
ns
–2
0.49
3.56
0.03
0.96
0.32
3.40
3.56
1.78
1.91
ns
Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on