參數(shù)資料
型號(hào)： AFE2124E
英文描述： Dual HDSL/SDSL ANALOG FRONT END
中文描述： 雙HDSL / SDSL是模擬前端
文件頁(yè)數(shù)： 2/11頁(yè)
文件大小： 187K
代理商： AFE2124E
2
AFE2124
SPECIFICATIONS
Typical at 25
°
C, AV
DD
= +5V, DV
DD
= +3.3V, and txBaudCLK = 584kHz (E1 rate), unless otherwise noted.Specifications apply to each channel of the AFE2124.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
AFE2124E
PARAMETER
COMMENTS
MIN
TYP
MAX
UNITS
RESOLUTION
14
Bits
RECEIVE CHANNEL
Number of Inputs
Input Voltage Range
Common-Mode Voltage
Input Impedance All Inputs
Input Capacitance
Input Gain Matching
Programmable Gain
Settling Time
Gain + Offset Error
Output Data Coding
Output Symbol Rate, rxSYNC
(3)
Output Bit Rate, rxSYNC
(3)
Differential
2
Balanced Differential
(1)
±
3.0
AV
/2
V
V
See Typical Performance Curves
10
±
2
0
6
5
pF
%
dB
Line Input vs Hybrid Input
0dB, 3dB, 6dB, 9dB and 12dB
For Any Change in Gain or txBaud CLK
Tested at Each Gain Range
Two’s Complement
+12
Symbol Periods
%FSR
(2)
32
64
584
1168
kHz
kbits/sec
TRANSMIT CHANNEL
Transmit Clock Rate, txBaudCLK
T1 Transmit –3dB Point
T1 Rate Power
(4, 5)
E1 Transmit –3dB Point
E1 Transmit Power
(4, 5)
Pulse Output
Common-Mode Voltage, V
CM
Output Resistance
(6)
Symbol Rate
32
584
kHz
kHz
dBm
kHz
dBm
ETSI RTR/TM - Compliant
txBoost = 0
ETSI RTR/TM - Compliant
txBoost = 0
196
13
14
292
13
See Typical Performance Curves
AV
DD
/2
1
14
V
DC to 1MHz
TRANSCEIVER PERFORMANCE
Uncancelled Echo
(5)
rxGAIN = 0dB, Loopback Enabled
rxGAIN = 0dB, Loopback Disabled
rxGAIN = 3dB, Loopback Disabled
rxGAIN = 6dB, Loopback Disabled
rxGAIN = 9dB, Loopback Disabled
rxGAIN = 12dB, Loopback Disabled
–71
–71
–74
–76
–78
–80
–68.5
–68.5
–71
–73.5
–75.5
–77.5
dB
dB
dB
dB
dB
dB
DIGITAL INTERFACE
(6)
Logic Levels
V
IH
V
IL
V
OH
V
t
rx1
Interface
|I
IH
| < 10
μ
A
|I
IL
| < 10
μ
A
I
OH
= –20
μ
A
OL
= 20
μ
A
DV
– 1
–0.3
DV
DD
– 0.5
DV
DD
+ 0.3
+0.8
V
V
V
V
ns
+0.4
14
9
POWER
Analog Power Supply Voltage
Analog Power Supply Voltage
Digital Power Supply Voltage
Digital Power Supply Voltage
Power Dissipation
(4, 5)
Power Dissipation
(4, 5)
Power Supply Rejection Ratio (PSRR)
Specification
Operating Range
Specification
Operating Range
AV
DD
= 5V, DV
DD
= 3.3V,
AV
DD
= DV
DD
= 5V
5
V
V
V
V
4.75
5.25
3.3
3.15
5.25
250
300
55
mW
mW
dB
TEMPERATURE RANGE
Operating
(6)
–40
+85
°
C
NOTES: (1) With a balanced differential signal, the positive input is 180
°
out of phase with the negative input, therefore, the actual voltage swing about the common-
mode voltage on each pin is
±
1.5V to achieve a total input range of
±
3.0V or 6Vp-p. (2) FSR is Full-Scale Range. (3) The output data is available at twice the symbol
rate. (4) With a pseudo-random equiprobable sequence of HDSL pulses; 13.5dBm applied to the transformer (16.5dBm output from txLINEP and txLINEN). (5) See
the Discussion of Specifications section of this data sheet for more information. (6) Guaranteed by design and characterization.
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AFE2124E/1KG4 功能描述:電信線路管理 IC Dual HDSL/SDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
AFE2124EG4 功能描述:電信線路管理 IC Dual HDSL/SDSL Analog Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
AFE2126 制造商:BB 制造商全稱:BB 功能描述:Dual HDSL/SDSL ANALOG FRONT END
AFE2126E 制造商:Rochester Electronics LLC 功能描述:- Bulk
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