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參數(shù)資料
| 型號(hào)： | ADXL210AE |
| 廠商： | ANALOG DEVICES INC |
| 元件分類(lèi)： | 模擬信號(hào)調(diào)理 |
| 英文描述： | Low-Cost 10 g Dual-Axis Accelerometer with Duty Cycle |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, CQCC8 |
| 封裝： | CERAMIC, LCC-8 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 169K |
| 代理商： | ADXL210AE |
REV. 0
ADXL210E
–10–
With the single pole roll-off characteristic, the typical noise of
the ADXL210E is determined by the following equation:
)
=
(
At 100 Hz the noise will be:
)
=
(
Noise rms
Hz
BW
)
×
×
(
)
200
1 6
.
μ
g/
Noise rms
Hz
m
)
×
×
(
)
200
100
1 6
.
2 53
.
μ
g
g
/
Often the peak value of the noise is desired. Peak-to-peak noise
can only be estimated by statistical methods. Table III is useful
for estimating the probabilities of exceeding various peak values,
given the rms value.
Table III. Estimation of Peak-to-Peak Noise
% of Time that Noise
Will Exceed Nominal
Peak-to-Peak Value
Nominal Peak-to-Peak
Value
2.0
×
rms
4.0
×
rms
6.0
×
rms
8.0
×
rms
32%
4.6%
0.27%
0.006%
The peak-to-peak noise value will give the best estimate of the
uncertainty in a single measurement.
Table IV gives typical noise output of the ADXL210E for various
C
X
and C
Y
values.
Table IV. Filter Capacitor Selection, C
X
and C
Y
Peak-to-Peak Noise
Estimate 95%
Probability (rms 4)
Bandwidth
C
X
, C
Y
rms Noise
10 Hz
50 Hz
100 Hz
200 Hz
500 Hz
0.47
μ
F
0.10
μ
F
0.05
μ
F
0.027
μ
F
0.01
μ
F
0.8 m
g
1.8 m
g
2.5 m
g
3.6 m
g
5.7 m
g
3.2 m
g
7.2 m
g
10.1 m
g
14.3 m
g
22.6 m
g
CHOOSING T2 AND COUNTER FREQUENCY: DESIGN
TRADE-OFFS
The noise level is one determinant of accelerometer resolution.
The second relates to the measurement resolution of the counter
when decoding the duty cycle output.
The ADXL210E
’
s duty cycle converter has a resolution of
approximately 14 bits; better resolution than the accelerometer
itself. The actual resolution of the acceleration signal is, how-
ever, limited by the time resolution of the counting devices used
to decode the duty cycle. The faster the counter clock, the higher
the resolution of the duty cycle and the shorter the T2 period
can be for a given resolution. The following table shows some of
the trade-offs. It is important to note that this is the resolution
due to the microprocessors
’
counter. It is probable that the
accelerometer
’
s noise floor may set the lower limit on the resolu-
tion, as discussed in the previous section.
MICROCOMPUTER INTERFACES
The ADXL210E is specifically designed to work with low-cost
microcontrollers. Specific code sets, reference designs, and applica-
tion notes are available from the factory. This section will outline a
general design procedure and discuss the various trade-offs that
need to be considered.
The designer should have some idea of the required performance
of the system in terms of:
Resolution
: the smallest signal change that needs to be detected.
Bandwidth
: the highest frequency that needs to be detected.
Acquisition Time
: the time that will be available to acquire the signal
on each axis.
These requirements will help to determine the accelerometer band-
width, the speed of the microcontroller clock and the length of
the T2 period.
When selecting a microcontroller it is helpful to have a counter
timer port available. The microcontroller should have provisions
for software calibration. While the ADXL210E is a highly accurate
accelerometer, it has a wide tolerance for initial offset. The
easiest way to null this offset is with a calibration factor saved on
the microcontroller or by a user calibration for zero
g
. In the
case where the offset is calibrated during manufacture, there are
several options, including external EEPROM and microcontrol-
lers with
“
one-time programmable
”
features.
DESIGN TRADE-OFFS FOR SELECTING FILTER
CHARACTERISTICS: THE NOISE/BW TRADE-OFF
The accelerometer bandwidth selected will determine the measure-
ment resolution (smallest detectable acceleration). Filtering can be
used to lower the noise floor and improve the resolution of the
accelerometer. Resolution is dependent on both the analog filter
bandwidth at X
FILT
and Y
FILT
and on the speed of the micro-
controller counter.
The analog output of the ADXL210E has a typical bandwidth
of 5 kHz, while the duty cycle modulators
’
bandwidth is 500 Hz.
The user must filter the signal at this point to limit aliasing
errors. To minimize DCM errors the analog bandwidth should be
less than one-tenth the DCM frequency. Analog bandwidth
may be increased to up to half the DCM frequency in many
applications. This will result in greater dynamic error generated
at the DCM.
The analog bandwidth may be further decreased to reduce noise
and improve resolution. The ADXL210E noise has the character-
istics of white Gaussian noise that contributes equally at all
frequencies and is described in terms of
μ
g
per root Hz; i.e., the
noise is proportional to the square root of the bandwidth of the
accelerometer. It is recommended that the user limit bandwidth to
the lowest frequency needed by the application to maximize the
resolution and dynamic range of the accelerometer.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADXL210AE-REEL | 功能描述:IC ACCELER DUAL-AX 10G 8CLCC RoHS:是 類(lèi)別:傳感器，轉(zhuǎn)換器 >> 加速計(jì) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:SCA1000 軸:X，Y 加速范圍:±1.7g 靈敏度:1.2V/g 電源電壓:4.75 V ~ 5.25 V 輸出類(lèi)型:數(shù)字 帶寬:50±30Hz 接口:SPI 安裝類(lèi)型:表面貼裝 封裝/外殼:12-SMD 供應(yīng)商設(shè)備封裝:12-SMD 其它名稱(chēng):551-1007-1 |
| ADXL210AQC | 制造商:Analog Devices 功能描述:ACCELERATION DETECTOR, 14 Pin, Ceramic, SOP |
| ADXL210AQC-1 | 制造商:Analog Devices 功能描述: |
| ADXL210E | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Low-Cost 10 g Dual-Axis Accelerometer with Duty Cycle |
| ADXL210EB | 制造商:Analog Devices 功能描述:Evaluation Board For ADXL210 制造商:Analog Devices 功能描述:SEMICONDUCTOR ((NW)) |
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