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參數(shù)資料
| 型號： | ADV7195KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs and 10-Bit Data Input |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP52 |
| 封裝： | PLASTIC, MQFP-52 |
| 文件頁數(shù)： | 17/36頁 |
| 文件大?。?/td> | 499K |
| 代理商： | ADV7195KST |
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REV. 0
ADV7195
–17–
MODE REGISTER 2
MR1 (MR27–MR20)
(Address (SR4–SR0) = 02H)
Figure 22 shows the various operations under the control of
Mode Register 2.
MR2 BIT DESCRIPTION
Y Delay (MR20–MR22)
This control bit delays the Y signal with respect to the falling
edge of the horizontal sync signal by up to four pixel clock
cycles. Figure 21 demonstrates this facility.
Color Delay (MR23–MR25)
This control allows delay of the color signals with respect to the
falling edge of the horizontal sync signal by up to four pixel
clock cycles. Figure 21 demonstrates this facility.
CGMS Enable (MR26)
When this bit is set to “1,” CGMS data is inserted on Line
41 in 525p mode. The CGMS conforms: to CGMS-A EIA-J
CPR1204-1, Transfer Method of Video ID information using
vertical blanking interval (525p System), March 1998 and
IEC61880, 1998, video systems (525/60)—video and accompanied
data using the vertical blanking interval—analog interface.
The CGMS data bits are programmed into the CGMS Data
Registers 0–2. For more information refer to CGMS Data
Registers section.
CGMS CRC (MR27)
This bit enables the automatic Cyclic Redundancy Check when
CGMS is enabled.
Y DELAY
PrPb DELAY
MAX
DELAY
NO DELAY
MAX DELAY
NO DELAY
Y OUTPUT
PrPb OUTPUT
Figure 21. Y and Color Delay
MR27
MR26
MR25
MR24
MR23
MR22
MR21
MR20
CGMS ENABLE
0
1
DISABLE
ENABLE
MR26
COLOR DELAY
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
0 PCLK
1 PCLK
2 PCLK
3 PCLK
4 PCLK
MR25
0
1
DISABLE
ENABLE
MR27
CGMS CRC
MR24 MR23
Y DELAY
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
0 PCLK
1 PCLK
2 PCLK
3 PCLK
4 PCLK
MR22 MR21 MR20
Figure 22. Mode Register 2
相關PDF資料 |
PDF描述 |
|---|---|
| ADV7196 | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7196A | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7196AKS | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7197 | Multiformat HDTV Encoder with Three 11-Bit DACs |
| ADV7197KST | Multiformat HDTV Encoder with Three 11-Bit DACs |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7195KSZ | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 11-Bit 52-Pin MQFP |
| ADV7196 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7196A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7196AKS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7197 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat HDTV Encoder with Three 11-Bit DACs |
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