參數(shù)資料
型號(hào)： ADV7189
廠商： Analog Devices, Inc.
英文描述： Multiformat SDTV Video Decoder
中文描述： 標(biāo)清多格式視頻解碼器
文件頁(yè)數(shù)： 76/104頁(yè)
文件大小： 890K
代理商： ADV7189
ADV7189
Table 181. Register 0x0F to 0x11
Subaddress
Register
0x0F
Power
Management
Rev. A | Page 76 of 104
Bit Description
Reserved
PDBP
. Power-down bit
priority selects between
PWRDN bit or PIN.
Bit
4
Register Setting
Set to default
Chip power-down
controlled by pin
Bit has priority (pin
disregarded)
Set to default
System functional
Powered down
Set to default
Normal operation
Comments
7
6
5
3
2
0
1
0
0
0
1
Reserved
PWRDN
. Power-down
places the decoder in a full
power-down mode.
0
0
0
1
0
0
See PDBP,
Register 0x0F, Bit 2.
Reserved
RES
. Chip Reset will load all
I
2
C bits with default values.
Executing reset
takes approx. 2 ms.
This bit is self-
clearing.
1
Start reset sequence
STATUS_1[7:0]
. Provides
information about the
internal status of the
decoder.
STATUS_1[3:0]
x
x
In lock (right now) = 1
Lost lock (since last
read)
Fsc lock (right now) = 1
Peak white AGC mode
active = 1
NTSM-MJ
NTSC-443
PAL-M
PAL-60
PAL-BGHID
SECAM
PAL combination N
SECAM 525
Color kill is active = 1
x
x
x
x
0
0
0
0
1
1
1
1
x
0
0
1
1
0
0
1
1
x
0
1
0
1
0
1
0
1
x
x
x
x
x
Detected standard.
STATUS_1[6:4]
AD_RESULT[2:0]
.
Autodetection result
reports the findings
0x10
Status Register
Read-Only
STATUS_1[7]
COL_KILL
.
Color Kill.
0x11
Info Register
Read-Only
IDENT[7:0].
Provides
identification on the
revision of the part.
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