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| 型號： | ADV7181BBCPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multiformat SDTV Video Decoder |
| 中文描述： | COLOR SIGNAL DECODER, QCC64 |
| 封裝： | 9 X 9 MM, LEAD FREE, MO-220-VMMD, LFCSP-64 |
| 文件頁數(shù)： | 41/96頁 |
| 文件大?。?/td> | 873K |
| 代理商： | ADV7181BBCPZ |
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ADV7181B
Table 54. Recommended User Settings for NTSC
(See Figure 21)
Register
Register Name
0x31
VSync Field Control 1
0x32
VSync Field Control 2
0x33
VSync Field Control 3
0x37
Polarity
0xE5
NTSV_V_Bit_Beg
0xE6
NTSC_V_Bit_End
0xE7
NTSC_F_Bit_Tog
Rev. 0 | Page 41 of 96
Write
0x12
0x81
0x84
0x29
0x0
0x3
0x85
0
ADVANCE BEGIN OF
VSYNC BY NVBEG[4:0]
DELAY BEGIN OF
VSYNC BY NVBEG[4:0]
VSYNC BEGIN
NVBEGSIGN
ODD FIELD
0
1
NO
YES
NVBEGDELO
VSBHO
ADDITIONAL
DELAY BY
1 LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NVBEGDELE
VSBHE
ADDITIONAL
DELAY BY
1 LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NOT VALID FOR USER
PROGRAMMING
Figure 22. NTSC VSync Begin
NVBEGDELO NTSC VSync Begin Delay on Odd Field,
Address 0xE5 [7]
When NVBEGDELO is 0 (default), there is no delay.
Setting NVBEGDELO to 1 delays VSync going high on an odd
field by a line relative to NVBEG.
NVBEGDELE NTSC Vsync Begin Delay on Even Field,
Address 0xE5 [6]
When NVBEGDELE is 0 (default), there is no delay.
Setting NVBEGDELE to 1 delays VSync going high on an even
field by a line relative to NVBEG.
NVBEGSIGN NTSC VSync Begin Sign, Address 0xE5 [5]
Setting NVBEGSIGN to 0 delays the start of VSync. Set for user
manual programming.
Setting NVBEGSIGN to 1 (default) advances the start of VSync.
Not recommended for user programming.
NVBEG[4:0] NTSC VSync Begin, Address 0xE5 [4:0]
The default value of NVBEG is 00101, indicating the NTSC
VSync begin position.
For all NTSC/PAL VSync timing controls, both the V bit in the
AV code and the VSync on the VS pin are modified.
0
ADVANCE END OF
VSYNC BY NVEND[4:0]
DELAY END OF VSYNC
BY NVEND[4:0]
VSYNC END
NVENDSIGN
ODD FIELD
0
1
NO
YES
NVENDDELO
VSEHO
ADDITIONAL
DELAY BY
1 LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NVENDDELE
VSEHE
ADDITIONAL
DELAY BY
1 LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NOT VALID FOR USER
PROGRAMMING
Figure 23. NTSC VSync End
NVENDDELO NTSC VSync End Delay on Odd Field,
Address 0xE6 [7]
When NVENDDELO is 0 (default), there is no delay.
Setting NVENDDELO to 1 delays VSync from going low on an
odd field by a line relative to NVEND.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7181BBSTZ | Multiformat SDTV Video Decoder |
| ADV7181BCP | Multiformat SDTV Video Decoder |
| ADV7181BST | Multiformat SDTV Video Decoder |
| ADV7183B | Multiformat SDTV Video Decoder |
| ADV7183BBSTZ | Multiformat SDTV Video Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7181BBSTZ | 制造商:Analog Devices 功能描述:Video Decoder 3ADC 9-Bit 64-Pin LQFP 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7181BCP | 制造商:Analog Devices 功能描述:Video Decoder 3ADC 9-Bit 64-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:10BIT NTSC/PAL/SECAM VIDEO DECODER I.C. - Bulk |
| ADV7181BCPZ | 制造商:Analog Devices 功能描述: |
| ADV7181BST | 制造商:Analog Devices 功能描述:Video Decoder 3ADC 9-Bit 64-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:9-BIT BIT NTSC/PAL/SECAM VIDEO DECODER - Bulk 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7181C | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, Integrated, Multiformat SDTV Video Decoder and RGB Graphics Digitizer |
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