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ADV7181B
Rev. 0 | Page 74 of 96
Bits
4
Subaddress
0x0F
Register
Power
Management
Bit Description
Reserved
7
6
5
3
2
1
0
0
0
Comments
Set to default
Notes
0
Chip power-down
controlled by pin
Bit has priority (pin
disregarded)
Set to default
System functional
Powered down
Set to default
Normal operation
PDBP. Power-down bit priority
selects between PWRDN bit or PIN.
1
Reserved
PWRDN. Power-down places the
decoder in a full power-down mode.
0
0
0
1
0
0
See PDBP, 0x0F Bit 2.
Reserved
RES. Chip reset loads all I
2
C bits with
default values.
1
Start reset sequence
Executing reset
takes approx. 2 ms.
This bit is self-
clearing.
Provides
information about
the internal status of
the decoder.
0x10
IN_LOCK
LOST_LOCK
FSC_LOCK
FOLLOW_PW
x
x
x
x
In lock (right now) = 1
Lost lock (since last read) = 1
Fsc lock (right now) = 1
Peak white AGC mode
active = 1
NTSM-MJ
NTSC-443
PAL-M
PAL-60
PAL-BGHID
SECAM
PAL combination N
SECAM 525
Color kill is active = 1
Status
Register 1.
Read-Only
0x11
IDENT
Read-Only
Status
Register 2.
Read-Only.
x
x
0
0
0
0
1
1
1
1
x
0
0
1
1
0
0
1
1
x
0
1
0
1
0
1
0
1
x
x
x
x
x
AD_RESULT[2:0]. Autodetection
result reports the standard of the
Input video.
Detected standard.
COL_KILL.
IDENT[7:0] Provides identification
on the revision of the part.
Color Kill.
ADV7181B = 0x13
0x12
MVCS DET
MVCS T3
x
x
MV color striping detected
MV color striping type
1 = Detected
0 = Type 2,
1 = Type 3
1 = Detected
1 = Detected
1 = Detected
1 = Detected
MV PS DET
MV AGC DET
LL NSTD
FSC NSTD
x
x
x
x
MV pseudo sync detected
MV AGC pulses detected
Nonstandard line length
Fsc frequency
nonstandard
1 = horizontal lock
achieved
1 = Gemstar data detected
SD 60 Hz detected
SD 50 Hz detected
1 = Free-run mode active
1 = Field length standard
0x13
Reserved
INST_HLOCK
x
x
x
Unfiltered
GEMD
SD_OP_50HZ
Reserved
FREE_RUN_ACT
STD FLD_LEN
x
x
x
x
x
SD Field rate detect
Blue screen output
Correct Field length
found
Field sequence
found
Reliable swinging
burst sequence
INTERLACED
x
1 = Interlaced video
detected
1 = Swinging burst
detected
Set to default.
Current sources switched
off
Current sources enabled
Set to default
Status
Register 3.
Read-Only.
PAL_SW_LOCK
x
Reserved
CCLEN. Current clamp enable allows
the user to switch off the current
sources in the analog front.
0
0
0
1
0
0
0
0
1
0x14
Analog
Clamp
Control
Reserved