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參數(shù)資料
| 型號(hào)： | ADV7181 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat SDTV Video Decoder |
| 中文描述： | 標(biāo)清多格式視頻解碼器 |
| 文件頁(yè)數(shù)： | 66/96頁(yè) |
| 文件大?。?/td> | 873K |
| 代理商： | ADV7181 |
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ADV7181B
I
2
C REGISTER MAP DETAILS
The following registers are located in Register Access Page 2.
Table 82. Interrupt Register Map Details
4
Register
Name
Value
rw
Interrupt
Config 0
Reserved
Interrupt
Status 1
Interrupt
Clear 1
Interrupt
Maskb 1
Rev. 0 | Page 66 of 96
Subaddress
Dec
64
Reset
Hex
0x40
Bit 7
INTRQ_
DUR_SEL.1
Bit 6
INTRQ_
DUR_SEL.0
Bit 5
MV_INTRQ
_SEL.1
Bit 4
MV_INTRQ
_SEL.0
Bit 3
Bit 2
MPU_
STIM_INTRQ
Bit 1
INTRQ_
OP_SEL.1
SD_
UNLOCK_Q
Bit 0
INTRQ_
OP_SEL.0
SD_LOCK_
Q
0001 x000
rw
65
66
0x41
0x42
MV_PS_
CS_Q
MV_PS_
CS_CLR
MV_PS_
CS_MSKB
SD_FR_
CHNG_Q
SD_FR_
CHNG_CLR
r
x000 0000
w
67
0x43
SD_UNLO
CK_CLR
SD_
UNLOCK_
MSKB
GEMD_Q
SD_LOCK
_CLR
SD_LOCK
_MSKB
x000 0000
rw
68
0x44
SD_FR_
CHNG_
MSKB
Reserved
Interrupt
Status 2
r
69
70
0x45
0x46
MPU_
STIM_
INTRQ_Q
MPU_
STIM_INT
RQ_CLR
MPU_
STIM_INT
RQ_MSKB
WSS_
CHNGD_Q
CGMS_
CHNGD_Q
CCAPD_Q
Interrupt
Clear 2
0xxx 0000
w
71
0x47
WSS_
CHNGD_
CLR
WSS_CHN
GD_MSKB
CGMS_
CHNGD_
CLR
CGMS_
CHNGD_
MSKB
SD_H_
LOCK
SD_H_
LOCK_
CHNG_Q
SD_H_
LOCK_
CHNG_CLR
SD_H_
LOCK_CH
NG_MSKB
GEMD_
CLR
CCAPD_
CLR
Interrupt
Maskb 2
0xxx 0000
rw
72
0x48
GEMD_
MSKB
CCAPD_
MSKB
Raw Status 3
r
73
0x49
SCM_
LOCK
SCM_
LOCK_
CHNG_Q
SCM_
LOCK_
CHNG_CLR
SCM_
LOCK_CH
NG_MSKB
SD_V_
LOCK
SD_V_
LOCK_
CHNG_Q
SD_V_LO
CK_CHNG
_CLR
SD_V_
LOCK_CH
NG_MSKB
SD_OP_
50HZ
SD_OP_
CHNG_Q
Interrupt
Status 3
r
74
0x4A
PAL_SW_
LK_
CHNG_Q
PAL_SW_
LK_CHNG
_CLR
PAL_SW_
LK_CHNG
_MSKB
SD_AD_
CHNG_Q
Interrupt
Clear 3
xx00 0000
w
75
0x4B
SD_AD_
CHNG_
CLR
SD_AD_
CHNG_
MSKB
SD_OP_
CHNG_CLR
Interrupt
Maskb 3
xx00 0000
rw
76
0x4C
SD_OP_
CHNG_
MSKB
4
To access the Interrupt Register Map, the Register Access page [1:0] bits in Register Address 0x0E must be programmed to 01b.
Table 83. Interrupt Register Map Details
Subaddress
0x40
Bit
3
x
Comments
Open drain
Drive low when active
Drive high when active
Reserved
Manual interrupt mode disabled
Manual interrupt mode enabled
Not used
Reserved
Pseudo sync only
Color stripe only
Pseudo sync or color stripe
3 Xtal periods
15 Xtal periods
63 Xtal periods
Active until cleared
Register
Interrupt
Config 1
Register
Access
Page 2
Bit Description
INTRQ_OP_SEL[1:0].
Interrupt Drive Level Select
7
0
0
1
1
6
0
1
0
1
5
0
0
1
1
4
0
1
0
1
2
0
1
1
0
0
1
1
0
0
1
0
1
Notes
MPU_STIM_INTRQ[1:0].
Manual Interrupt Set Mode
Reserved
MV_INTRQ_SEL[1:0].
Macrovision Interrupt Select
INTRQ_DUR_SEL[1:0].
Interrupt duration Select
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7181B | Multiformat SDTV Video Decoder |
| ADV7181BBCPZ | Multiformat SDTV Video Decoder |
| ADV7181BBSTZ | Multiformat SDTV Video Decoder |
| ADV7181BCP | Multiformat SDTV Video Decoder |
| ADV7181BST | Multiformat SDTV Video Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7181B | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Multiformat SDTV Video Decoder |
| ADV7181BBCPZ | 制造商:Analog Devices 功能描述:Video Decoder 3ADC 9-Bit 64-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:ADV718XB DECODER FAMILY UPDATES - Bulk 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7181BBSTZ | 制造商:Analog Devices 功能描述:Video Decoder 3ADC 9-Bit 64-Pin LQFP 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7181BCP | 制造商:Analog Devices 功能描述:Video Decoder 3ADC 9-Bit 64-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:10BIT NTSC/PAL/SECAM VIDEO DECODER I.C. - Bulk |
| ADV7181BCPZ | 制造商:Analog Devices 功能描述: |
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