參數(shù)資料
型號(hào)： ADV7173KSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 36/60頁(yè)
文件大小： 0K
描述： IC DAC VIDEO NTSC 6-CH 48LQFP
標(biāo)準(zhǔn)包裝： 1
類型： 視頻編碼器
應(yīng)用： 多媒體
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤
產(chǎn)品目錄頁(yè)面： 786 (CN2011-ZH PDF)
REV. B
ADV7172/ADV7173
–41–
The ADV7172/ADV7173 is a highly integrated circuit containing
both precision analog and high speed digital circuitry. It has
been designed to minimize interference effects on the integrity
of the analog circuitry by the high speed digital circuitry. It is
imperative that these same design and layout techniques be applied
to the system level design so that high speed, accurate performance
is achieved. The Recommended Analog Circuit Layout shows
the analog interface between the device and monitor.
The layout should be optimized for lowest noise on the ADV7172/
ADV7173 power and ground lines by shielding the digital inputs
and providing good decoupling. The lead length between groups
of VAA and GND pins should by minimized to minimize induc-
tive ringing.
Ground Planes
The ground plane should encompass all ADV7172/ADV7173
ground pins, voltage reference circuitry, power supply bypass cir-
cuitry for the ADV7172/ADV7173, the analog output traces, and
all the digital signal traces leading up to the ADV7172/ADV7173.
The ground plane is the board’s common ground plane.
Power Planes
The ADV7172/ADV7173, and any associated analog circuitry,
should have its own power plane, referred to as the analog
power plane (VAA). This power plane should be connected to
the regular PCB power plane (VCC) at a single point through a
ferrite bead. This bead should be located within three inches of
the ADV7172/ADV7173.
The metallization gap separating device power plane and
board power plane should be as narrow as possible to mini-
mize the obstruction to the flow of heat from the device into
the general board.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7172/ADV7173 power pins and voltage
reference circuitry.
Plane-to-plane noise coupling can be reduced by ensuring that
portions of the regular PCB power and ground planes do not
overlay portions of the analog power plane unless they can be
arranged so that the plane-to-plane noise is common-mode.
Supply Decoupling
For optimum performance, bypass capacitors should be in-
stalled using the shortest leads possible, consistent with reliable
operation, to reduce the lead inductance. Best performance is
APPENDIX 1
BOARD DESIGN AND LAYOUT CONSIDERATIONS
obtained with 0.1
F ceramic capacitor decoupling. Each group
of VAA pins on the ADV7172/ADV7173 must have at least one
0.1
F decoupling capacitor to GND. These capacitors should
be placed as close to the device as possible.
It is important to note that while the ADV7172/ADV7173
contains circuitry to reject power supply noise, this rejection
decreases with frequency. If a high frequency switching power
supply is used, the designer should pay close attention to reduc-
ing power supply noise and consider using a three-terminal voltage
regulator for supplying power to the analog power plane.
Digital Signal Interconnect
The digital inputs to the ADV7172/ADV7173 should be iso-
lated as much as possible from the analog outputs and other
analog circuitry. Also, these input signals should not overlay the
analog power plane.
Due to the high clock rates involved, long clock lines to the
ADV7172/ADV7173 should be avoided to reduce noise pickup.
Any active termination resistors for the digital inputs should be
connected to the regular PCB power plane (VCC) and not the
analog power plane.
Analog Signal Interconnect
The ADV7172/ADV7173 should be located as close to the
output connectors as possible to minimize noise pickup and
reflections due to impedance mismatch.
The video output signals should overlay the ground plane, not
the analog power plane, to maximize the high frequency power
supply rejection.
Digital inputs, especially pixel data inputs and clocking signals,
should never overlay any of the analog signal circuitry and
should be kept as far away as possible.
For best performance, the outputs should each have a 75
load
resistor connected to GND. These resistors should be placed
as close as possible to the ADV7172/ADV7173 to minimize
reflections.
The ADV7172/ADV7173 should have no inputs left floating.
Any inputs that are not required should be tied to ground.
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參數(shù)描述
ADV7173KSTZ-REEL 功能描述:IC DAC VIDEO NTSC 6-CH 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7174 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management
ADV7174BCP 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management
ADV7174BCP-REEL 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management
ADV7174KCP 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management
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