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| 型號(hào)： | ADV7171KSUZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 11/64頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC VIDEO ENC NTSC 44TQFP TR |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | 機(jī)頂盒，視頻播放器 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-TQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 帶卷 (TR) |
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ADV7170/ADV7171
Rev. C | Page 19 of 64
HSYNC
FIELD/VSYNC
CLOCK
GREEN/LUMA/Y
RED/CHROMA/V
BLUE/COMPOSITE/U
COMPOSITE
ADV7170/ADV7171
P7–P0
SCRESET/RTC
H/LTRANSITION
COUNT START
LOW
128
RTC
TIME SLOT: 01
14
67 68
NOT USED IN
ADV7170/ADV7171
19
VALID
SAMPLE
INVALID
SAMPLE
FSCPLL INCREMENT
1
8/LLC
5 BITS
RESERVED
SEQUENCE
BIT2
RESET
BIT3
RESERVED
4 BITS
RESERVED
21
0
13
14 BITS
RESERVED
0
VIDEO
DECODER
(FOR EXAMPLE,
ADV7185)
COMPOSITE VIDEO
(FOR EXAMPLE,
VCR OR CABLE)
NOTES:
1F
SCPLL INCREMENT IS 22 BITS LONG, VALUE LOADED INTO ADV7170/ADV7171 FSC DDS REGISTER IS
FSCPLL INCREMENTS BITS 21:0 PLUS BITS 0:9 OF SUBCARRIER FREQUENCY REGISTERS. ALL ZEROS SHOULD
BE WRITTEN TO THE SUBCARRIER FREQUENCY REGISTERS OF THE ADV7170/ADV7171.
2SEQUENCE BIT
PAL: 0 = LINE NORMAL, 1 = LINE INVERTED
NTSC: 0 = NO CHANGE
3RESET BIT
RESET ADV7170/ADV7171 DDS
00221-019
Figure 19. RTC Timing and Connections
Vertical Blanking Data Insertion
It is possible to allow encoding of incoming YCbCr data on
those lines of VBI that do not bear line sync or pre-/post-
equalization pulses (see Figure 21 to Figure 32). This mode of
operation is called “partial blanking” and is selected by setting
MR32 to 1. It allows the insertion of any VBI data (opened VBI)
into the encoded output waveform. This data is present in the
digitized incoming YcbCr data stream (for example, WSS data,
CGMS, VPS, and so on). Alternatively, the entire VBI may be
blanked (no VBI data inserted) on these lines by setting MR32
to 0.
Mode 0 (CCIR-656): Slave Option
(Timing Register 0 TR0 = X X X X X 0 0 0)
The ADV7170/ADV7171 are controlled by the SAV (start active
video) and EAV (end active video) time codes in the pixel data.
All timing information is transmitted using a 4-byte synchroni-
zation pattern. A synchronization pattern is sent immediately
before and after each line during active picture and retrace.
Mode 0 is shown in Figure 20. The HSYNC, FIELD/VSYNC,
and BLANK (if not used) pins should be tied high during this
mode.
Y
C
r
Y
F
0
X
Y
8
0
1
0
8
0
1
0
F
0
F
A
B
A
B
A
B
8
0
1
0
8
0
1
0
F
0
X
Y
C
b
Y C
r
C
b
Y
C
b
Y
C
r
EAV CODE
SAV CODE
ANCILLARY DATA
(HANC)
4 CLOCK
268 CLOCK
1440 CLOCK
4 CLOCK
280 CLOCK
1440 CLOCK
END OF ACTIVE
VIDEO LINE
START OF ACTIVE
VIDEO LINE
ANALOG
VIDEO
INPUT PIXELS
NTSC/PAL M SYSTEM
(525 LINES/60Hz)
PAL SYSTEM
(625 LINES/50Hz)
Y
00221-020
Figure 20. Timing Mode 0 (Slave Mode)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7171KSZ | 功能描述:IC DAC VIDEO ENC NTSC 44-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7171KSZ | 制造商:Analog Devices 功能描述:IC, VIDEO ENCODER, 10BIT, MQFP-44 |
| ADV7171KSZ-REEL | 功能描述:IC DAC VIDEO ENC NTSC 44-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7171SU | 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management |
| ADV7171WBSZ-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder |
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