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參數(shù)資料
型號: ADV7123JSTZ330
廠商: Analog Devices Inc
文件頁數(shù): 4/24頁
文件大?。?/td> 0K
描述: IC DAC VIDEO 3CH 330MHZ 48-LQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 3
電壓電源: 單電源
功率耗散(最大): 30mW
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 6 電流,單極
采樣率(每秒): 330M
產(chǎn)品目錄頁面: 785 (CN2011-ZH PDF)
ADV7123
Rev. D | Page 12 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
5 V TYPICAL PERFORMANCE CHARACTERISTICS
VAA = 5 V, VREF = 1.235 V, IOUT = 17.62 mA, 50 Ω doubly terminated load, differential output loading, TA = 25°C, unless otherwise noted.
fCLK (MHz)
74
58
T
H
D
(
d
Bc)
50
100
140
72
70
68
64
60
66
76
62
0
160
FOURTH
HARMONIC
THIRD
HARMONIC
SECOND
HARMONIC
00
21
5-
00
7
fOUT (MHz)
70
0
0.1
1
S
F
DR
(
d
B
c
)
20.2
2.51
40.4
60
50
40
20
10
30
SFDR (DE)
SFDR (SE)
100
5.04
00
21
5-
0
04
Figure 4. SFDR vs. fOUT @ fCLK = 140 MHz (Single-Ended and Differential)
Figure 7. THD vs. fCLK @ fOUT = 2 MHz (Second, Third, and Fourth Harmonics)
IOUT (mA)
0.9
0
L
IN
E
ARI
T
Y
(
L
S
B)
0.8
0.7
0.6
0.4
0.2
0.5
1.0
0.3
17.62
2
0.1
00
21
5-
00
8
70
0
SF
D
R
(d
B
c
)
60
50
40
20
10
30
80
SFDR (SE)
SFDR (DE)
fOUT (MHz)
0.1
1
20.2
2.51
40.4
100
5.04
00
21
5-
0
05
Figure 5. SFDR vs. fOUT @ fCLK = 50 MHz (Single-Ended and Differential)
Figure 8. Linearity vs. IOUT
TEMPERATURE (°C)
71.8
70.4
S
F
DR
(
d
B
c
)
71.6
71.4
71.2
70.8
70.6
71.0
72.0
85
65
45
–10
25
5
0
02
15
-0
06
CODE (INL)
–1.0
E
RRO
R
(
L
S
B)
0.5
–0.5
0
1.0
0.75
1023
–0.16
00
21
5-
0
09
Figure 6. SFDR vs. Temperature @ fCLK = 50 MHz (fOUT = 1 MHz)
Figure 9. Typical Linearity (INL)
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