參數(shù)資料
型號(hào): ADV473KP110
廠商: ANALOG DEVICES INC
元件分類: 顯示控制器
英文描述: Circular Connector; No. of Contacts:55; Series:LJTP02R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:17-35
中文描述: PALETTE-DAC DSPL CTLR, PQCC68
封裝: PLASTIC, LCC-68
文件頁(yè)數(shù): 2/12頁(yè)
文件大小: 200K
代理商: ADV473KP110
REV. A
–2–
ADV473–SPECIFICATIONS
(V
AA1
= 5 V; V
REF
= 1.235 V; R
L
= 37.5
, C
L
= 10 pF; R
SET
= 140
.
All specifications T
MN
to T
MAX2
unless otherwse noted.)
Parameter
All Versions
Units
T est Conditions/Comments
ST AT IC PERFORMANCE
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
Gray Scale Error
8
Bits
±
1
±
1
±
5
±
10
LSB max
LSB max
% Gray Scale
% Gray Scale
Binary
Guaranteed Monotonic
External Reference
Internal Reference
Coding
DIGIT AL INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN
DIGIT AL OUT PUT S
Output High Voltage, V
OH
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Leakage Capacitance
2
0.8
±
1
7
V min
V max
μ
A max
pF max
V
IN
= 0.4 V or 2.4 V
f = 1 MHz, V
IN
= 2.4 V
2.4
0.4
50
7
V min
V max
μ
A max
pF max
I
SOURCE
= 400
μ
A
I
SINK
= 3.2 mA
ANALOG OUT PUT S
Gray Scale Current Range
Output Current
White Level Relative to Black
20
mA max
16.74
18.50
0.95
1.90
0
50
6.29
8.96
0
50
69.1
2
0
+1.5
30
10
mA min
mA max
mA min
mA max
μ
A min
μ
A max
mA min
mA max
μ
A min
μ
A max
μ
A typ
% max
V min
V max
pF max
k
typ
T ypically 17.62 mA
Black Level Relative to Blank
(Pedestal = 7.5 IRE)
Black Level Relative to Blank
(Pedestal = 0 IRE)
Blank Level
T ypically 1.44 mA
T ypically 5
μ
A
T ypically 7.62 mA
Sync Level
T ypically 5
μ
A
LSB Size
DAC-to-DAC Matching
Output Compliance, V
OC
T ypically 1%
Output Capacitance, C
OUT
Output Impedance, R
OUT
VOLT AGE REFERENCE
Internal Voltage Reference (V
REFOUT
)
External Voltage Reference Range
Input Current, I
VREF
(Internal Reference)
Input Current (External Reference)
f = 1 MHz, I
OUT
= 0 mA
1.08/1.32
1.14/1.26
100
10
V min/V max
V min/V max
μ
A typ
μ
A typ
T ypically 1.235 V
T ypically 1.235 V
POWER SUPPLY
Supply Voltage, V
Supply Current, I
AA
4.75/5.25
400
300
250
200
V min/V max
mA max
mA max
mA max
mA max
135 MHz Parts
110 MHz Parts
80 MHz Parts
66 MHz Parts
DYNAMIC PERFORMANCE
Clock and Data Feedthrough
4, 5
Glitch Impulse
4, 5
DAC-to-DAC Crosstalk
6
–30
75
–23
dB typ
pV secs typ
dB typ
NOT ES
1
V
AA
= 5 V
±
5%
2
T emperature range (T
MIN
to T
MAX
); 0
°
C to +70
°
C; T
J
(Silicon Junction T emperature)
100
°
C.
3
Pixel Port is continuously clocked with data corresponding to a linear ramp.
4
Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. Glitch impulse includes clock and data feedthrough.
5
T T L input values are 0 to 3 volts, with input rise/fall times
3 ns, measured at the 10% and 90% points. T iming reference points at 50% for inputs and outputs.
6
DAC to DAC Crosstalk is measured by holding one DAC high while the other two are making low to high and high to low transitions.
Specifications subject to change without notice.
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