
ADuM1310
Given the geometry of the receiving coil in the ADuM1310 and
an imposed requirement that the induced voltage be at most
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field at a given frequency can be calculated. The result
is shown in Figure 11.
Rev. E | Page 13 of 16
MAGNETIC FIELD FREQUENCY (Hz)
100
M
D
0.001
1M
10
0.01
1k
10k
10M
1
1
100M
100k
0
Figure 11. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is approximately
50% of the sensing threshold and does not cause a faulty output
transition. Similarly, if such an event occurs during a transmitted
pulse (and is of the worst-case polarity), it reduces the received
pulse from >1.0 V to 0.75 V—still well above the 0.5 V sensing
threshold of the decoder.
The preceding magnetic flux density values correspond to specific
current magnitudes at given distances away from the ADuM1310
transformers. Figure 12 expresses these allowable current mag-
nitudes as a function of frequency for selected distances. As
can be seen, the ADuM1310 is extremely immune and can be
affected only by extremely large currents operated at high fre-
quency, very close to the component. For the 1 MHz example
noted, a 0.5 kA current needed to be placed 5 mm away from
the ADuM1310 to affect the operation of the component.
MAGNETIC FIELD FREQUENCY (Hz)
M
1000
100
10
1
0.1
0.01
1k
10k
100M
100k
1M
10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
0
Figure 12. Maximum Allowable Current for Various
Current-to-ADuM1310 Spacings
Note that at combinations of strong magnetic field and high
frequency, any loops formed by printed circuit board traces
could induce sufficiently large error voltages to trigger the
thresholds of succeeding circuitry. Care should be taken in the
layout of such traces to avoid this possibility.
POWER CONSUMPTION
The supply current at a given channel of the ADuM1310
isolator is a function of the supply voltage, the data rate of the
channel, and the output load of the channel.
For each input channel, the supply current is given by
I
DDI
=
I
DDI (Q)
I
DDI
=
I
DDI (D)
× (2
f
–
f
r
) +
I
DDI (Q)
f
≤ 0.5
f
r
f
> 0.5
f
r
For each output channel, the supply current is given by
I
DDO
=
I
DDO (Q)
I
DDO
= (
I
DDO (D)
+
C
L
V
DDO
) × (2
f
–
f
r
) +
I
DDO (Q)
f
≤ 0.5
f
r
f
≤ 0.5
f
r
where:
I
DDI (D)
,
I
DDO (D)
are the input and output dynamic supply currents
per channel (mA/Mbps).
C
L
is the output load capacitance (pF).
V
DDO
is the output supply voltage (V).
f
is the input logic signal frequency (Hz, half of the input data
rate, NRZ signaling).
f
r
is the input stage refresh rate (bps).
I
DDI (Q)
,
I
DDO (Q)
are the specified input and output quiescent
supply currents (mA).
To calculate the total I
DD1
and I
DD2
supply current, the supply
currents for each input and output channel corresponding to
I
DD1
and I
DD2
are calculated and totaled. Figure 4 and Figure 5
provide per-channel supply currents as a function of the data
rate for an unloaded output condition. Figure 6 provides per-
channel supply current as a function of the data rate for a 15 pF
output condition. Figure 7 through Figure 8 provide total I
DD1
and I
DD2
supply current as a function of the data rate for the
ADuM1310.