參數(shù)資料
型號(hào)： ADUC847BSZ62-5
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 56/108頁(yè)
文件大?。?/td> 0K
描述： IC FLASH MCU W/24BIT ADC 52-MQFP
產(chǎn)品培訓(xùn)模塊： Process Control
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 12.58MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： POR，PSM，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲(chǔ)器容量： 62KB（62K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 10x24b; D/A 1x12b，2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 52-QFP
包裝： 托盤(pán)
產(chǎn)品目錄頁(yè)面： 738 (CN2011-ZH PDF)
配用： EVAL-ADUC847QSZ-ND - KIT DEV QUICK START FOR ADUC847
Data Sheet
ADuC845/ADuC847/ADuC848
Rev. C | Page 51 of 108
USING FLASH/EE DATA MEMORY
The 4 kbytes of Flash/EE data memory are configured as 1024
pages, each of 4 bytes. As with the other ADuC845/ADuC847/
ADuC848 peripherals, the interface to this memory space is via
a group of registers mapped in the SFR space. A group of four
data registers (EDATA1–4) holds the 4 bytes of data at each
page. The page is addressed via the EADRH and EADRL
registers. Finally, ECON is an 8-bit control register that can be
written to with one of nine Flash/EE memory access commands
to trigger various read, write, erase, and verify functions. A
block diagram of the SFR interface to the Flash/EE data memory
array is shown in Figure 32.
ECON—Flash/EE Memory Control SFR
Programming either Flash/EE data memory or Flash/EE
program memory is done through the Flash/EE memory
control SFR (ECON). This SFR allows the user to read, write,
erase, or verify the 4 kbytes of Flash/EE data memory or the
56 kbytes of Flash/EE program memory.
BYTE 1
(0000H)
E
DATA1
S
FR
BYTE 1
(0004H)
BYTE 1
(0008H)
BYTE 1
(000CH)
BYTE 1
(0FF8H)
BYTE 1
(0FFCH)
BYTE 2
(0001H)
E
DATA2
S
FR
BYTE 2
(0005H)
BYTE 2
(0009H)
BYTE 2
(000DH)
BYTE 2
(0FF9H)
BYTE 2
(0FFDH)
BYTE 3
(0002H)
E
DATA3
S
FR
BYTE 3
(0006H)
BYTE 3
(000AH)
BYTE 3
(000EH)
BYTE 3
(0FFAH)
BYTE 3
(0FFEH)
BYTE 4
(0003H)
E
DATA4
S
FR
BYTE 4
(0007H)
BYTE 4
(000BH)
BYTE 4
(000FH)
BYTE 4
(0FFBH)
(0FFFH)
01H
00H
02H
03H
3FEH
3FFH
P
A
GE
ADDRE
S
(E
ADRH/L)
BYTE
ADDRESSES
ARE GIVEN IN
BRACKETS
04741-032
BYTE 4
Figure 32. Flash/EE Data Memory Control and Configuration
Table 32. ECON—Flash/EE Memory Commands
ECON Value
Command Description
(Normal Mode, Power-On Default)
Command Description
(ULOAD Mode)
01H Read
4 bytes in the Flash/EE data memory, addressed by the
page address EADRH/L, are read into EDATA1–4.
Not implemented. Use the MOVC instruction.
02H Write
Results in 4 bytes in EDATA1–4 being written to the
Flash/EE data memory, at the page address given by
EADRH (0
≤ EADRH < 0400H). Note that the 4 bytes in the
page being addressed must be pre-erased.
Bytes 0 to 255 of internal XRAM are written to the 256 bytes of
Flash/EE program memory at the page address given by
EADRH/L (0
≤ EADRH/L < E0H).
Note that the 256 bytes in the page being addressed must be
pre-erased.
03H
Reserved.
04H Verify
Verifies that the data in EDATA1–4 is contained in the
page address given by EADRH/L. A subsequent read of
the ECON SFR results in a 0 being read if the verification
is valid, or a nonzero value being read to indicate an
invalid verification.
Not implemented. Use the MOVC and MOVX instructions to
verify the Write in software.
05H Erase Page
4-byte page of Flash/EE data memory address is erased
by the page address EADRH/L.
64-byte page of FLASH/EE program memory addressed by the
byte address EADRH/L is erased. A new page starts when EADRL
is equal to 00H, 80H, or C0H.
06H Erase All
4 kbytes of Flash/EE data memory are erased.
The entire 56 kbytes of ULOAD are erased.
81H ReadByte
The byte in the Flash/EE data memory, addressed by the
byte address EADRH/L, is read into EDATA1 (0
≤ EADRH/L
≤ 0FFFH).
Not implemented. Use the MOVC command.
82H WriteByte
The byte in EDATA1 is written into Flash/EE data memory
at the byte address EADRH/L.
The byte in EDATA1 is written into Flash/EE program memory at
the byte address EADRH/L (0 ≤ EADRH/L ≤ DFFFH).
0FH EXULOAD
Configures the ECON instructions (above) to operate on
Flash/EE data memory.
Enters normal mode, directing subsequent ECON instructions to
operate on the Flash/EE data memory.
F0H ULOAD
Enters ULOAD mode; subsequent ECON instructions
operate on Flash/EE program memory.
Enables the ECON instructions to operate on the Flash/EE
program memory. ULOAD entry mode.
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