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參數(shù)資料
| 型號： | ADUC842BSZ62-5 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC/DAC 12BIT W/MCU 52-MQFP |
| 標準包裝： | 1 |
| 系列： | MicroConverter® ADuC8xx |
| 核心處理器： | 8052 |
| 芯體尺寸： | 8-位 |
| 速度： | 16.78MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設備： | DMA，PSM，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 62KB（62K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 2.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.75 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 2x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 52-QFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 738 (CN2011-ZH PDF) |
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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 28 of 88
Table 11. Some Single-Supply Op Amps
Op Amp Model
Characteristics
OP281/OP481
Micropower
OP191/OP291/OP491
I/O Good up to VDD, Low Cost
OP196/OP296/OP496
I/O to VDD, Micropower, Low Cost
OP183/OP283
High Gain-Bandwidth Product
OP162/OP262/OP462
High GBP, Micro Package
AD820/AD822/AD824
FET Input, Low Cost
AD823
FET Input, High GBP
Keep in mind that the ADC’s transfer function is 0 V to VREF,
and that any signal range lost to amplifier saturation near
ground will impact dynamic range. Though the op amps in
Table 11 are capable of delivering output signals that very
closely approach ground, no amplifier can deliver signals all the
way to ground when powered by a single supply. Therefore, if a
negative supply is available, you might consider using it to
power the front end amplifiers. If you do, however, be sure to
include the Schottky diodes shown in Figure 31 (or at least the
lower of the two diodes) to protect the analog input from
undervoltage conditions. To summarize this section, use the
circuit in Figure 31 to drive the analog input pins of the parts.
Voltage Reference Connections
The on-chip 2.5 V band gap voltage reference can be used as the
reference source for the ADC and DACs. To ensure the accuracy
of the voltage reference, you must decouple the CREF pin to
ground with a 0.47 F capacitor, as shown in Figure 32. Note
that this is different from the ADuC812/ADuC831/ADuC832.
BUFFER
0.47
F
51
VREF = NC
CREF
2.5V
BAND GAP
REFERENCE
ADuC841/ADuC842/ADuC843
03260-0-030
Figure 32. Decoupling VREF and CREF
If the internal voltage reference is to be used as a reference for
external circuitry, the CREF output should be used. However, a
buffer must be used in this case to ensure that no current is
drawn from the CREF pin itself. The voltage on the CREF pin is that
of an internal node within the buffer block, and its voltage is
critical for ADC and DAC accuracy. The parts power up with
their internal voltage reference in the off state.
If an external voltage reference is preferred, it should be
connected to the CREF pin as shown in Figure 33. Bit 6 of the
ADCCON1 SFR must be set to 1 to switch in the external
reference voltage.
To ensure accurate ADC operation, the voltage applied to CREF
must be between 1 V and AVDD. In situations where analog
input signals are proportional to the power supply (such as in
some strain gage applications), it may be desirable to connect
the CREF pin directly to AVDD. Operation of the ADC or DACs
with a reference voltage below 1 V, however, may incur loss of
accuracy, eventually resulting in missing codes or non-
monotonicity. For that reason, do not use a reference voltage
lower than 1 V.
BUFFER
51
CREF
EXTERNAL
VOLTAGE
REFERENCE
1 = EXTERNAL
0 = INTERNAL
0.1
F
2.5V
BAND GAP
REFERENCE
ADuC841/ADuC842/ADuC843
ADCCON1.6
VDD
03260-0-031
VREF = NC
Figure 33. Using an External Voltage Reference
Configuring the ADC
The parts’ successive approximation ADC is driven by a divided
down version of the master clock. To ensure adequate ADC
operation, this ADC clock must be between 400 kHz and
8.38 MHz. Frequencies within this range can be achieved easily
with master clock frequencies from 400 kHz to well above
16 MHz, with the four ADC clock divide ratios to choose from.
For example, set the ADC clock divide ratio to 8 (i.e., ADCCLK
= 16.777216 MHz/8 = 2 MHz) by setting the appropriate bits in
ADCCON1 (ADCCON1.5 = 1, ADCCON1.4 = 0). The total
ADC conversion time is 15 ADC clocks, plus 1 ADC clock for
synchronization, plus the selected acquisition time (1, 2, 3, or 4
ADC clocks). For the preceding example, with a 3-clock
acquisition time, total conversion time is 19 ADC clocks (or
9.05 s for a 2 MHz ADC clock).
In continuous conversion mode, a new conversion begins each
time the previous one finishes. The sample rate is then simply
the inverse of the total conversion time described previously. In
the preceding example, the continuous conversion mode sample
rate is 110.3 kHz.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC842BSZ62-5 | 制造商:Analog Devices 功能描述:IC MICROCONTROLLER |
| ADUC843BCP32-3 | 制造商:Analog Devices 功能描述:MICROCONVERTER, ADUC842 WITHOUT DAC'S - Trays |
| ADUC843BCP32-5 | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 62KB Flash 5V 56-Pin LFCSP EP |
| ADUC843BCP32Z-5 | 功能描述:IC ADC 12BIT W/FLASH MCU 56LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設備:欠壓檢測/復位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
| ADUC843BCP62-3 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3V 56-Pin LFCSP EP |
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