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參數資料
型號: ADUC832BCPZ
廠商: Analog Devices Inc
文件頁數: 15/92頁
文件大?。?/td> 0K
描述: IC MCU 62K FLASH ADC/DAC 56LFCSP
標準包裝: 1
系列: MicroConverter® ADuC8xx
核心處理器: 8052
芯體尺寸: 8-位
速度: 16MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設備: PSM,溫度傳感器,WDT
輸入/輸出數: 34
程序存儲器容量: 62KB(62K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 2.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數據轉換器: A/D 8x12b,D/A 2x12b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
包裝: 托盤
ADuC832
Data Sheet
Rev. B | Page 22 of 92
Pin No.
Mnemonic
MQFP
LFCSP
Type
Description
VREF
8
10
I/O
Reference Input/Output. This pin is connected to the internal reference through a
series resistor and is the reference source for the analog-to-digital converter. The
nominal internal reference voltage is 2.5 V, which appears at the pin. See the Voltage
Reference Connections section on how to connect an external reference.
DAC0
9
11
O
Voltage Output from DAC0.
DAC1
10
12
O
Voltage Output from DAC1.
P1.4/ADC4
11
13
I
Input Port 1 (P1.4). Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults
to analog input mode. To configure any Port 1 pin as a digital input, write a 0 to the
Port 1 bit. Port 1 pins are multifunctional and share the following functionality.
I
Single-Ended Analog Input (ADC4). Channel selection is via ADCCON2 SFR.
P1.5/ADC5/SS
12
14
I
Input Port 1 (P1.5). Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults
to analog input mode. To configure any of these Port Pins as a digital input, write a 0
to the port bit. Port 1 pins are multifunction and share the following functionality.
I
Single-Ended Analog Input (ADC5). Channel selection is via ADCCON2 SFR.
I
Slave Select Input for the SPI Interface (SS).
P1.6/ADC6
13
15
I
Input Port 1 (P1.6). Port 1 is an 8-bit input port only. Unlike other ports, Port 1 defaults
to analog input mode. To configure any Port 1 pin as a digital input, write a 0 to the
Port 1 bit. Port 1 pins are multifunctional and share the following functionality.
I
Single-Ended Analog Input (ADC6). Channel selection is via ADCCON2 SFR.
P1.7/ADC7
14
16
I
Input Port 1 (P1.7). Port 1 is an 8-bit input port only. Unlike other ports, Port 1
defaults to Analog Input mode. To configure any Port 1 pin as a digital input,
write a 0 to the Port 1 bit. Port 1 pins are multifunctional and share the following
functionality.
I
Single-Ended Analog Input (ADC7). Channel selection is via ADCCON2 SFR.
RESET
15
17
I
Digital Input. A high level on this pin for 24 master clock cycles while the oscillator is
running resets the device.
P3.0/RxD
16
18
I/O
Input/Output Port 3 (P3.0). Port 3 is a bidirectional port with internal pull-up resistors.
Port 3 pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 3 pins being pulled
externally low sources current because of the internal pull-up resistors.
I
Receiver Data Input (Asynchronous) or Data Input/Output (Synchronous) of Serial
(UART) Port (RxD).
P3.1/TxD
17
19
I/O
Input/Output Port 3 (P3.1). Port 3 is a bidirectional port with internal pull-up resistors.
Port 3 pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 3 pins being pulled
externally low sources current because of the internal pull-up resistors.
O
Transmitter Data Output (Asynchronous) or Clock Output (Synchronous) of Serial
(UART) Port (TxD).
P3.2/INT0
18
20
I
Input/Output Port 3 (P3.2). Port 3 is a bidirectional port with internal pull-up resistors.
Port 3 pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 3 pins being pulled
externally low sources current because of the internal pull-up resistors.
I
Interrupt 0 (INT0). This programmable edge or level triggered interrupt input can be
programmed to one of two priority levels. This pin can also be used as a gate control
input to Timer 0.
P3.3/INT1/MISO/PWM1
19
21
I
Input/Output Port 3 (P3.3). Port 3 is a bidirectional port with internal pull-up resistors.
Port 3 pins that have 1s written to them are pulled high by the internal pull-up
resistors, and in that state can be used as inputs. As inputs, Port 3 pins being pulled
externally low sources current because of the internal pull-up resistors.
I
Interrupt 1 (INT1). This programmable edge or level triggered interrupt input can be
programmed to one of two priority levels. This pin can also be used as a gate control
input to Timer 1.
I/O
SPI Master Input/Slave Output Data I/O Pin for SPI Serial Interface (MISO).
O
PWM1 Voltage Output (PWM1). See the ADuC832 Configuration SFR (CFG832) section
for further information.
DVDD
20, 34,
48
22, 36,
51
P
Digital Positive Supply Voltage, 3 V or 5 V Nominal.
DGND
21, 35,
47
23, 37,
38, 50
G
Digital Ground. Ground reference point for the digital circuitry.
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