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參數(shù)資料
| 型號： | ADUC812BS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Circular Connector; No. of Contacts:37; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:25-37 |
| 中文描述： | 8-BIT, FLASH, 11.0592 MHz, MICROCONTROLLER, PQFP52 |
| 封裝： | MQFP-52 |
| 文件頁數(shù)： | 11/31頁 |
| 文件大?。?/td> | 543K |
| 代理商： | ADUC812BS |
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REV. 0
ADuC812
–
11
–
many applications this autocalibration download function suf-
fices. Alternatively, a device calibration can be easily initiated by
user software to compensate for significant changes in operating
conditions (CLK frequency, analog input range, reference volt-
age and supply voltages).
This in-circuit software calibration feature allows the user to
remove various system and reference related errors (whether it
be internal or external reference) and to make use of the full
dynamic range of the ADC by adjusting the analog input range
of the part for a specific system. Contact Analog Devices, Inc.
for further details on the implementation of the software calibra-
tion routine in your applications.
ADC MODES OF OPERATION
Typical Operation
Once configured via the ADCCON 1-3 SFRs (shown previ-
ously) the ADC will convert the analog input and provide an
ADC 12-bit result word in the ADCDATAH/L SFRs. The top
four bits of the ADCDATAH SFR will be written with the
channel selection bits to identify the channel result. The format
of the ADC 12-bit result word is shown in Figure 5.
CH
–
ID
TOP 4 BITS
HIGH 4 BITS OF
ADC RESULT WORD
LOW 8 BITS OF THE
ADC RESULT WORD
ADCDATAH SFR
ADCDATAL SFR
Figure 5. ADC Result Format
ADC DMA Mode
The on-chip ADC has been designed to run at a maximum speed
of one sample every 5
μ
s (i.e., 200 kHz sampling rate). Therefore,
in an interrupt driven routine the user software is required to ser-
vice the interrupt, read the ADC result and store the result for
further post processing, all within 5
μ
s otherwise the next ADC
sample could be lost. In applications where the ADuC812 can-
not sustain the interrupt rate, an ADC DMA Mode is provided.
The ADC DMA Mode is enabled via the DMA enable bit
(ADCCON2.6), which allows the ADC to sample continuously
as per configuration in ADCCON SFRs. Each sample result is
written into an external Static RAM (mapped in the data memory
space) without any interaction from the ADuC812 core. This
mode ensures the ADuC812 can capture a contiguous sample
stream even at full speed ADC update rates.
Before enabling ADC DMA mode the user must first configure
the external SRAM to which the ADC samples will be written.
This consists of writing the required ADC DMA channels into
the channel ID bits (the top four bits) in the external SRAM. A
typical pre
configuration of external memory is sho
wn in Figure 6.
Once the external data memory has been preconfigured, the
DMA address pointer (DMAP, DMAH and DMAL) SFRs are
written. These SFRs should be written with the DMA start
address in external memory. In Figure 6, for example, the DMA
start address is 000000H. The 3-byte start address should be
written in the following order: DMAL, DMAH and DMAP.
The end of a DMA table is signified by writing “1111” into the
channel selection bits field.
1
1
1
1
0
0
1
1
0
0
1
1
1
0
0
0
0
1
0
1
0
0
1
0
00000AH
000000H
STOP COMMAND
REPEAT LAST CHANNEL
FOR A VALID STOP
CONDITION
CONVERT ADC CH#3
CONVERT TEMP SENSOR
CONVERT ADC CH#5
CONVERT ADC CH#2
Figure 6. Typical DMA External Memory Preconfiguration
The DMA Enable bit (ADCCON2.6, DMA) can now be set to
initiate the DMA conversion and transfer of the results sequen-
tially into external memory. Remember that the DMA mode
will only progress if the user has preconfigured the ADC
conversion time and trigger modes via the ADCCON1 and 2
SFRs. The end of DMA conversion is signified by the ADC
interrupt bit ADCCON2.7.
At the end of ADC DMA Mode, the external data memory
contains the new ADC conversion results as shown in Figure 7.
It should be noted that the channel selection bits are still present
in the result words to identify the individual conversion results.
NO CONVERSION
RESULT WRITTEN HERE
CONVERSION RESULT
FOR ADC CH#3
CONVERSION RESULT
FOR TEMP SENSOR
CONVERSION RESULT
FOR ADC CH#5
CONVERSION RESULT
FOR ADC CH#2
1
1
1
1
0
0
1
1
0
0
1
1
1
0
0
0
0
1
0
1
0
0
1
0
00000AH
000000H
STOP COMMAND
Figure 7. Typical External Memory Configuration Post
ADC DMA Operation
Micro Operation during ADC DMA Mode
During ADC DMA mode the MicroConverter core is free to
continue code execution, including general housekeeping and
communication tasks. However, it should be noted that MCU
core accesses to Ports 0 and 2 (which, of course, are being used
by the DMA controller) are gated “OFF” during ADC DMA
mode of operation. This means that even though the instruction
that accesses the external Ports 0 or 2 will appear to execute, no
data will be seen at these external port pins as a result.
The MicroConverter core is interrupted once the requested
block of DMA data has been captured and written to external
memory allowing the service routine for this interrupt to post-
process the data without any real time, timing constraints.
SFR Interface to the DAC Block
The ADuC812 incorporates two 12-bit DACs on-chip. DAC
operation is controlled via a single control special function
register and four data special function registers, namely:
DAC0L/DAC1L
– Contains the lower 8-bit DAC byte.
DAC0H/DAC1H
– Contains the high 4-bit DAC byte.
DACCON
– Contains general purpose control bits
required for DAC0 and DAC1 operation.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC812BS | 制造商:Analog Devices 功能描述:12-BIT ADC WITH EMBEDDED |
| aduc812bs-01 | 制造商:Analog Devices 功能描述: |
| ADUC812BS-REEL | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 8KB Flash 3.3V/5V 52-Pin MQFP T/R |
| ADUC812BSZ | 功能描述:IC ADC 12BIT MULTICH MCU 52-MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標準包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉換器:A/D 6x12b 振蕩器型:內部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| ADUC812BSZ-01 | 制造商:Analog Devices 功能描述:12-BIT ADC WITH EMBEDDED MCU I.C. |
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