參數(shù)資料
型號： ADUC7032BSTZ-88
廠商： Analog Devices Inc
文件頁數(shù)： 104/120頁
文件大?。?/td> 0K
描述： IC MCU 96K FLASH DUAL 48LQFP
標準包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 托盤
ADuC7032-8L
Rev. A | Page 84 of 120
GPIO Port1 Data Register
Name:
GP1DAT
Address:
0xFFFF0D30
Default Value:
0x000000XX
Access:
Read/write
Function:
This 32-bit MMR configures the direction of the GPIO pins assigned to Port1 (see Table 58). This register also sets the output
value for GPIO pins configured as outputs and reads the status of GPIO pins configured as inputs.
Table 63. GP1DAT MMR Bit Designations
Bit
Description
31 to 26
Reserved. These bits are reserved and should be written as 0 by user code.
25
Port1.1 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to P1.1 as an input.
Set to 1 by user code to configure the GPIO pin assigned to P1.1 as an output.
24
Port1.0 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to P1.0 as an input.
Set to 1 by user code to configure the GPIO pin assigned to P1.0 as an output.
23 to 18
Reserved. These bits are reserved and should be written as 0 by user code.
17
Port1.1 Data Output. The value written to this bit appears directly on the GPIO pin assigned to P1.1.
16
Port1.0 Data Output. The value written to this bit appears directly on the GPIO pin assigned to P1.0.
15 to 2
Reserved. These bits are reserved and should be written as 0 by user code.
1
Port1.1 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to P1.1. User code should
write 0 to this bit.
0
Port1.0 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to P1.0. User code should
write 0 to this bit.
GPIO Port2 Data Register
Name:
GP2DAT
Address:
0xFFFF0D40
Default Value:
0x000000XX
Access:
Read/write
Function:
This 32-bit MMR configures the direction of the GPIO pins assigned to Port2 (see Table 58). This register also sets the output
value for GPIO pins configured as outputs and reads the status of GPIO pins configured as inputs.
Table 64. GP2DAT MMR Bit Designations
Bit
Description
31
Reserved. This bit is reserved and should be written as 0 by user code.
30
Port2.6 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to P2.6 as an input.
Set to 1 by user code to configure the GPIO pin assigned to P2.6 as an output.
29
Port2.5 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to P2.5 as an input.
Set to 1 by user code to configure the GPIO pin assigned to P2.5 as an output. This configuration is used to support diagnostic
write capability to the high voltage I/O pins.
28
Port2.4 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to P2.4 as an input. This configuration is used to support
diagnostic readback capability from the high voltage I/O pins (see HVCFG1[2:0]).
Set to 1 by user code to configure the GPIO pin assigned to P2.4 as an output.
27 to 26
Reserved. These bits are reserved and should be written as 0 by user code.
25
Port2.1 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to P2.1 as an input.
Set to 1 by user code to configure the GPIO pin assigned to P2.1 as an output.
24
Port2.0 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to P2.0 as an input.
Set to 1 by user code to configure the GPIO pin assigned to P2.0 as an output.
23
Reserved. This bit is reserved and should be written as 0 by user code.
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