參數(shù)資料
型號(hào): ADT7482ARMZ-RL
廠商: ON SEMICONDUCTOR
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 11BIT(s), 2.5Cel, SQUARE, SURFACE MOUNT
封裝: LEAD FREE, MO-187-BA, MSOP-10
文件頁數(shù): 6/24頁
文件大?。?/td> 335K
代理商: ADT7482ARMZ-RL
ADT7482
Rev. 1 | Page 14 of 24 | www.onsemi.com
STATUS REGISTERS
The status registers are read-only registers at Addresses 0x02
(Status Register 1) and Address 0x23 (Status Register 2). They
contain status information for the ADT7482.
Table 12. Status Register 1 Bit Assignments
Bit
Name
Function
ALERT
7
BUSY
1 when ADC converting
No
6
LHIGH1
1 when local high temperature limit
tripped
Yes
5
LLOW1
1 when local low temperature limit
tripped
Yes
4
R1HIGH1
1 when Remote 1 high temperature
limit tripped
Yes
3
R1LOW1
1 when Remote 1 low temperature
limit tripped
Yes
2
D1 OPEN1
1 when Remote 1 sensor open
circuit
Yes
1
R1THRM1
1 when Remote1 THERM limit
tripped
No
0
LTHRM1
1 when local THERM limit tripped
No
These flags stay high until the status re gister is read, or they are reset by POR
1 These flags stay high until the status register is read, or they are reset by POR.
Table 13. Status Register 2 Bit Assignments
Bit
Name
Function
ALERT
7
Res
Reserved for future use
No
6
Res
Reserved for future use
No
5
Res
Reserved for future use
No
4
R2HIGH1
1 when Remote 2 high temperature
limit tripped
Yes
3
R2LOW1
1 when Remote 2 low temperature
limit tripped
Yes
2
D2 OPEN1
1 when Remote 2 sensor open
circuit
Yes
1
R2THRM1
1 when Remote2 THERM limit
tripped
No
0
ALERT
1 when ALERT condition exists.
No
1 These flags stay high until the status register is read, or they are reset by POR.
The eight flags that can generate an ALERT are NOR’d together.
When any flags are high, the ALERT interrupt latch is set and
the ALERT output goes low (provided they are not masked out).
Reading the Status 1 register clears the 5 flags, (Bit 6 through
Bit 2) in Status Register 1, provided the error conditions that
caused the flags to be set have gone away. Reading the Status 2
Register clears the three flags, (Bit 4 through Bit 2) in Status
Register 2, provided the error conditions that caused the flags to
be set have gone away. A flag bit can only be reset if the
corresponding value register contains an in-limit measurement
or if the sensor is good.
The ALERT interrupt latch is not reset by reading the status
register. It is reset when the ALERT output has been serviced by
the master reading the device address, provided the error
condition has gone away and the status register flag bits have
been reset.
When Flag 1 and/or Flag 0 of Status Register 1 or Flag 1 of
Status Register 2 are set, the THERM output goes low to
indicate that the temperature measurements are outside the
programmed limits. The THERM output does not need to be
reset, unlike the ALERT output. Once the measurements are
within the limits, the corresponding status register bits are reset
automatically, and the THERM output goes high. To add
hysteresis, program Register 0x21. The THERM output is reset
only when the temperature falls below the THERM limit minus
hysteresis.
When Pin 8 is configured as THERM2, only the high
temperature limits are relevant. If Flag 6 or Flag 4 of Status
Register 1 or Flag 4 of Status Register 2 are set, the THERM2
output goes low to indicate that the temperature measurements
are outside the programmed limits. Flag 5 and Flag 3 of Status
Register 1 and Flag 3 of Status Register 2 have no effect on
THERM2. The behavior of THERM2 is otherwise the same
as THERM.
Bit 0 of the Status Register 2 is set whenever the ADT7482
ALERT output is asserted low. Read Status Register 2 to
determine if the ADT7482 is responsible for the ALERT. This
bit is reset when the ALERT output is reset. If the ALERT
output is masked, then this bit is not set.
OFFSET REGISTER
Offset errors can be introduced into the remote temperature
measurement by clock noise or by the thermal diode being
located away from the hot spot. To achieve the specified
accuracy on this channel, these offsets must be removed.
The offset values are stored as 10-bit, twos complement values.
The Remote 1 Offset MSBs are stored in Register 0x11 and
the LSBs are stored in Register 0x12 (low byte, left
justified). The Remote 2 Offset MSBs are stored in Register
0x34 and the LSBs are stored in Register0x35 (low byte, left
justified).
The Remote 2 Offset can be written to or read from the
Remote 1 Offset Registers if Bit 3 of the Configuration 1
register is set to 1. This bit should be set to 0 (default) to
read the Remote 1 offset values.
Only the upper 2 bits of the LSB registers are used. The MSB of
MSB offset registers is the sign bit. The minimum offset that
can be programmed is 128°C, and the maximum is +127.75°C.
The value in the offset register is added or subtracted to the
measured value of the remote temperature.
The offset register powers up with a default value of 0°C and
has no effect unless a different value is written to it.
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