參數(shù)資料
型號(hào): ADSP-BF536BBC-4A
廠商: Analog Devices Inc
文件頁(yè)數(shù): 15/68頁(yè)
文件大?。?/td> 0K
描述: IC DSP CTLR 16BIT 182CSPBGA
產(chǎn)品培訓(xùn)模塊: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
標(biāo)準(zhǔn)包裝: 1
系列: Blackfin®
類型: 定點(diǎn)
接口: CAN,SPI,SSP,TWI,UART
時(shí)鐘速率: 400MHz
非易失內(nèi)存: 外部
芯片上RAM: 100kB
電壓 - 輸入/輸出: 2.50V,3.30V
電壓 - 核心: 1.20V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 182-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 182-CSPBGA(12x12)
包裝: 托盤
Rev. J
|
Page 22 of 68
|
February 2014
Clock
CLKIN
I
Clock/Crystal Input
XTAL
O
Crystal Output (If CLKBUF is enabled, does not three-state during hibernate.)
CLKBUF
O
Buffered XTAL Output (If enabled, does not three-state during hibernate.)
E
Mode Controls
RESET
IReset
NMI
I
Nonmaskable Interrupt (This pin should be pulled high when not used.)
BMODE2–0
I
Boot Mode Strap 2-0 (These pins must be pulled to the state required for the
desired boot mode.)
Voltage Regulator
VROUT1–0
O
External FET Drive (These pins should be left unconnected when not used and
are driven high during hibernate.)
Supplies
VDDEXT
P
I/O Power Supply
VDDINT
P
Internal Power Supply
VDDRTC
P
Real-Time Clock Power Supply (This pin should be connected to VDDEXT when
not used and should remain powered at all times.)
GND
G
External Ground
1 See Output Drive Currents on Page 50 for more information about each driver types.
Table 9. Pin Descriptions (Continued)
Pin Name
Type Function
Driver
Type1
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