參數(shù)資料
型號(hào): ADSP-21msp58
廠商: Analog Devices, Inc.
英文描述: DSP Microcomputer(DSP 微計(jì)算機(jī))
中文描述: 微機(jī)的DSP(數(shù)字信號(hào)處理器微計(jì)算機(jī))
文件頁(yè)數(shù): 27/40頁(yè)
文件大?。?/td> 392K
代理商: ADSP-21MSP58
ADSP-21msp58/59
REV. 0
–27–
Parameter
Min
Max
Unit
Bus Request/Grant
T iming Requirement:
t
BH
t
BS
Switching Characteristic:
t
SD
BR
Hold after CLK OUT High
1
BR
Setup before CLK OUT Low
1
0.25t
CK
+ 2
0.25t
CK
+ 17
ns
ns
CLK OUT High to
DMS
,
PMS
,
BMS
,
RD
,
WR
Disable
DMS
,
PMS
,
BMS
,
RD
,
WR
Disable to
BG
Low
BG
High to
DMS
,
PMS
,
BMS
,
RD
,
WR
Enable
DMS
,
PMS
,
BMS
,
RD
,
WR
Enable to CLK OUT High
0.25t
CK
+ 10
ns
t
SDB
0
ns
t
SE
0
ns
t
SEC
0.25t
CK
– 7
ns
NOT ES
1
BR
is an asynchronous signal. If
BR
meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized
on the following cycle. Refer to the
ADSP-2100 Family User’s Manual
for
BR
/
BG
cycle relationships.
CLKOUT
t
BS
t
BH
BR
CLKOUT
t
SD
t
SDB
t
SEC
t
SE
PMS
,
DMS
,
BMS
,
RD
,
WR
BG
Figure 17. Bus Request–Bus Grant
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