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參數資料
| 型號： | ADSP-2185NKCAZ-320 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 8/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 16BIT 80MHZ 144CSPBGA |
| 標準包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點 |
| 接口： | 主機接口，串行端口 |
| 時鐘速率： | 80MHz |
| 非易失內存： | 外部 |
| 芯片上RAM： | 80kB |
| 電壓 - 輸入/輸出： | 1.8V，2.5V，3.3V |
| 電壓 - 核心： | 1.80V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LFBGA，CSPBGA |
| 供應商設備封裝： | 144-CSBGA（10x10） |
| 包裝： | 托盤 |
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Rev. A
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Page 16 of 48
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August 2006
ADSP-218xN
Fill and dump memory
Source level debugging
The VisualDSP++ IDE lets programmers define and manage
DSP software development. The dialog boxes and property
pages let programmers configure and manage all of the ADSP-
218xN development tools, including the syntax highlighting in
the VisualDSP++ editor. This capability controls how the devel-
opment tools process inputs and generate outputs.
The ADSP-2189M EZ-KIT Lite
provides developers with a
cost-effective method for initial evaluation of the powerful
ADSP-218xN DSP family architecture. The ADSP-2189M EZ-
KIT Lite includes a stand-alone ADSP-2189M DSP board sup-
ported by an evaluation suite of VisualDSP++. With this EZ-
KIT Lite, users can learn about DSP hardware and software
development and evaluate potential applications of the ADSP-
218xN series. The ADSP-2189M EZ-KIT Lite provides an evalu-
ation suite of the VisualDSP++ development environment with
the C compiler, assembler, and linker. The size of the DSP exe-
cutable that can be built using the EZ-KIT Lite tools is limited to
8K words.
The EZ-KIT Lite includes the following features:
75 MHz ADSP-2189M
Full 16-Bit Stereo Audio I/O with AD73322 Codec
RS-232 Interface
EZ-ICE Connector for Emulator Control
DSP Demonstration Programs
Evaluation Suite of VisualDSP++
The ADSP-218x EZ-ICE
Emulator provides an easier and
more cost-effective method for engineers to develop and opti-
mize DSP systems, shortening product development cycles for
faster time-to-market. ADSP-218xN series members integrate
on-chip emulation support with a 14-pin ICE-Port interface.
This interface provides a simpler target board connection that
requires fewer mechanical clearance considerations than other
ADSP-2100 Family EZ-ICEs. ADSP-218xN series members
need not be removed from the target system when using the EZ-
ICE, nor are any adapters needed. Due to the small footprint of
the EZ-ICE connector, emulation can be supported in final
board designs.The EZ-ICE performs a full range of functions,
including:
In-target operation
Up to 20 breakpoints
Single-step or full-speed operation
Registers and memory values can be examined and altered
PC upload and download functions
Instruction-level emulation of program booting
and execution
Complete assembly and disassembly of instructions
C source-level debugging
Designing an EZ-ICE-Compatible System
ADSP-218xN series members have on-chip emulation support
and an ICE-Port, a special set of pins that interface to the EZ-
ICE. These features allow in-circuit emulation without replac-
ing the target system processor by using only a 14-pin
connection from the target system to the EZ-ICE. Target sys-
tems must have a 14-pin connector to accept the EZ-ICE’s in-
circuit probe, a 14-pin plug.
Note:
The EZ-ICE uses the same VDD voltage as the VDD voltage
used for VDDEXT. Because the input pins of the ADSP-218xN
series members are tolerant to input voltages up to 3.6 V,
regardless of the value of VDDEXT, the voltage setting for the EZ-
ICE must not exceed 3.3 V.
Issuing the chip reset command during emulation causes the
DSP to perform a full chip reset, including a reset of its memory
mode. Therefore, it is vital that the mode pins are set correctly
PRIOR to issuing a chip reset command from the emulator user
interface. If a passive method of maintaining mode information
is being used (as discussed in Setting Memory Mode on Page 5),
it does not matter that the mode information is latched by an
emulator reset. However, if the RESET pin is being used as a
method of setting the value of the mode pins, the effects of an
emulator reset must be taken into consideration.
One method of ensuring that the values located on the mode
pins are those desired is to construct a circuit like the one shown
in Figure 15. This circuit forces the value located on the Mode A
pin to logic high, regardless of whether it is latched via the
RESET or ERESET pin.
The ICE-Port interface consists of the following ADSP-218xN
pins: EBR, EINT, EE, EBG, ECLK, ERESET, ELIN, EMS, and
ELOUT.
These ADSP-218xN pins must be connected only to the EZ-ICE
connector in the target system. These pins have no function
except during emulation, and do not require pull-up or pull-
down resistors. The traces for these signals between the
ADSP-218xN and the connector must be kept as short as possi-
ble, no longer than 3 inches.
The following pins are also used by the EZ-ICE: BR, BG, RESET,
and GND.
EZ-KIT Lite is a registered trademark of Analog Devices, Inc.
EZ-ICE is a registered trademark of Analog Devices, Inc.
Figure 15. Mode A Pin/EZ-ICE Circuit
PROGRAMMABLE I/O
MODE A/PF0
RESET
ERESET
ADSP-218xN
1k
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADSP-2185NKST-320 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 80MHz 80MIPS 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:16K PM/16K DM RAM,16-BIT, 80 MIPS, 1.8V - Bulk 制造商:Analog Devices 功能描述:Digital Signal Processor IC Supply Volta |
| ADSP-2185NKSTZ-320 | 功能描述:IC DSP CONTROLLER 16BIT 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數字式信號處理器） 系列:ADSP-21xx 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，FCBGA 供應商設備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-2185NKSTZ-3202 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP2186 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2186 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
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