參數(shù)資料
型號(hào)： ADSP-2173BST-80
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字信號(hào)處理
英文描述： DSP Microcomputer
中文描述： 24-BIT, 10 MHz, OTHER DSP, PQFP128
封裝： PLASTIC, TQFP-128
文件頁(yè)數(shù)： 32/52頁(yè)
文件大?。?/td> 664K
代理商： ADSP-2173BST-80
REV. A
–32–
ADSP-2171/ADSP-2172/ADSP-2173
ADSP-2173 TIMNGPARAMETERS
GE NE RAL NOT E S
Use the exact timing information given. Do not attempt to de-
rive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, you cannot
meaningfully add up parameters to derive longer times.
T IMING NOT E S
Switching characteristics specify how the processor changes its
signals. You have no control over this timing; it is dependent on
the internal design. T iming requirements apply to signals that
are controlled outside the processor, such as the data input for a
read operation.
T iming requirements guarantee that the processor operates cor-
rectly with another device. Switching characteristics tell you
what the device will do under a given circumstance. Also, use
the switching characteristics to ensure any timing requirement
of a device connected to the processor (such as memory) is
satisfied.
ME MORY RE QUIRE ME NT S
T his chart links common memory device specification names
and ADSP-2173 timing parameters for your convenience.
Common
Memory Device
Specification Name
Parameter
Name
Function
t
ASW
A0-A13,
DMS
,
PMS
Setup before
WR
Low
A0-A13,
DMS
,
PMS
before
WR
Deasserted
A0-A13,
DMS
,
PMS
Hold after
WR
Deasserted
Data Setup before
WR
High Data Setup T ime
Data Hold after
WR
High
RD
Low to Data Valid
A0-A13,
DMS
,
PMS
,
BMS
to Data Valid
Address Setup to
Write Start
Setup Address Setup
to Write End
Address Hold T ime
t
AW
t
WRA
t
DW
t
DH
t
RDD
t
AA
Data Hold T ime
OE
to Data Valid
Address Access T ime
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