參數(shù)資料
型號(hào): ADSP-2173BST-80
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號(hào)處理
英文描述: DSP Microcomputer
中文描述: 24-BIT, 10 MHz, OTHER DSP, PQFP128
封裝: PLASTIC, TQFP-128
文件頁數(shù): 20/52頁
文件大?。?/td> 664K
代理商: ADSP-2173BST-80
REV. A
–20–
ADSP-2171/ADSP-2172/ADSP-2173
ADSP-2171/ADSP-2172
Parameter
Min
Max
Unit
Interrupts and Flags
T iming Requirement:
t
IFS
t
IFH
IRQx
or FI Setup before CLK OUT Low
1, 2, 3
IRQx
or FI Hold after CLK OUT High
1, 2, 3
0.25t
CK
+ 15
0.25t
CK
ns
ns
Switching Characteristic:
t
FOH
t
FOD
Flag Output Hold after CLK OUT Low
4
Flag Output Delay from CLK OUT Low
4
0.5t
CK
– 7
ns
ns
0.5t
CK
+ 5
NOT ES
1
If
IRQx
and FI inputs meet t
and t
setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
the following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the User’s Manual for further information on interrupt servicing.)
2
Edge-sensitive interrupts require pulse widths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3
IRQx
=
IRQ0
,
IRQ1
, and
IRQ2
.
4
Flag Output = FL0, FL1, FL2, and FO.
CLKOUT
FLAG
OUTPUTS
IRQ
x
FI
t
IFS
t
FOD
t
FOH
t
IFH
Figure 9. Interrupts and Flags
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