參數(shù)資料
型號(hào): ADS931E
元件分類(lèi): ADC
英文描述: Analog-to-Digital Converter, 8-Bit
中文描述: 8位模數(shù)轉(zhuǎn)換器
文件頁(yè)數(shù): 10/13頁(yè)
文件大?。?/td> 247K
代理商: ADS931E
ADS931
SBAS060A
10
A
1
V
IN
R
F
R
1
0.1μF
2k
2k
IN
CM
REFB
External
Bottom Reference
REFT
R
S
R
IN
R
2
R
CM1
R
CM2
22pF
C
2
ADS931
External
Top Reference
+5V
Again, the input coupling capacitor C
1
and resistor R
1
form
a high-pass filter. At the same time, the input impedance is
defined by R
1
. Although many high-speed op amps operate
on single supply voltages down to +3V, their ac-perfor-
mance is often lower when compared to their +5V ac-
performance. This is especially true at signal frequencies of
5MHz or higher, where noticeable degradation is exhibited
that will limit the performance of the system. If possible, the
op amp and A/D converter pair should be supplied with +5V
and the common-mode voltage set to +2.5V, which is
usually the preferred dc bias level for single-supply op amps.
Keeping the signal swing within 1Vp-p prevents the op amp
from exhibiting excessive distortion caused by its slew-rate
limitations. Depending on the selected amplifier, the use of
a pull-up or pull-down resistor (R
P
) located directly at its
output may considerably improve the distortion perfor-
mance. Resistor R
S
isolates the op amp’s output from the
capacitive load to avoid gain peaking or even oscillation. It
can also be used to establish a defined bandwidth in order to
roll off the high frequency noise. The value of R
S
is usually
set between 10
and 100
.
DC-COUPLED INTERFACE CIRCUIT
Shown in Figure 5 is a single-supply, DC-coupled circuit
which can be set in a gain of –1V/V or higher. Depending on
the gain, the divider ratio set by resistors R
1
and R
2
must be
adjusted to yield the correct common-mode voltage for the
ADS931. With a +3V supply, the input signal of the ADS931
is 1Vp-p, typically centered around the common-mode volt-
age of +1.5V, which can be derived from the external
references.
EXTERNAL REFERENCE
The ADS931 requires external references on pin 22 (REFT)
and pin 24 (REFB). Internally those pins are connected by
the resistor ladder, which has a nominal resistance of 4k
(
±
15%). In order to establish a correct voltage drop across
the ladder, the external reference circuit must be able to
supply typically 250
μ
A of current. With this current the full-
scale input range of the ADS931 is set between +1V and
+2V, or 1Vp-p. In general, the voltage drop across REFT
and REFB determines the input full-scale range (FSR) of the
ADS931. Equation 4 can be used to calculate the span.
FSR = REFT – REFB
(4)
Depending on the application, several options are possible to
supply the external reference voltages to the ADS931 with-
out degrading the typical performance.
LOW-COST SOLUTION
The easiest way to achieve the required reference voltages is
to place the reference ladder of the ADS931 between the
supply rails, as shown in Figure 6. Two additional resistors
(R
T
, R
B
) are necessary to set the correct current through the
ladder. The table in Figure 6 lists the value for several
possible configurations, however depending on the desired
full-scale swing and supply voltage, different resistor values
might be selected.
The trade-offs, when selecting this reference circuit, are the
variations in the reference voltages due to component toler-
ances, temperature drift and power supply variations. In any
case, it is recommended to bypass the reference ladder with
at least 0.1
μ
F ceramic capacitors, as shown in Figure 6. The
purpose of the capacitors is twofold. They will bypass most
of the high frequency noise which results from feedthrough
of the clock and switching noise from the sample and hold
stages. Secondly, they serve as a charge reservoir to supply
instantaneous current to internal nodes.
HIGH ACCURACY SOLUTION
For those application demanding a higher level of dc accu-
racy and drift a reference circuit with a precision reference
element might be used (see Figure 7). A stable +1.2V
FIGURE 5. Single-Ended, DC-Coupled Interface Circuit.
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