參數(shù)資料
型號(hào): ADS902
英文描述: 10-Bit, 30MHz Sampling ANALOG-TO-DIGITAL CONVERTER
中文描述: 10位,30MHz的采樣模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 8/11頁(yè)
文件大?。?/td> 194K
代理商: ADS902
8
ADS902
signal swing should remain approximately 0.5V away from
each rail during normal operation.
DRIVING THE ANALOG INPUTS
AC-COUPLED DRIVER
Figure 3 shows an example of an ac-coupled, single-ended
interface circuit using a high-speed op amp that operates on
dual supplies (OPA650, OPA658). The mid-point reference
voltage, V
CM
, biases the bipolar, ground-referenced input
signal. The capacitor C
1
and resistor R
1
form a high-pass
filter with the –3dB frequency set at
f
–3dB
= 1/(2
π
R
1
C
1
)
(2)
The values for C
1
and R
1
are not critical in most applications
and can be set freely, e.g. the shown values correspond to a
frequency of 1.6kHz.
quantizer stage converts on the edge of the sub-clock, which
is the same frequency of the externally applied clock. The
output of each quantizer is fed into its own delay line to
time-align it with the data created from the following quan-
tizer stages. This aligned data is fed into a digital error
correction circuit which can adjust the output data based on
the information found on the redundant bits. This technique
provides the ADS902 with excellent differential linearity
and guarantees no missing codes at the 10-bit level.
As a result of this pipeline architecture, there is a 5.0 clock
cycle data delay (latency) from the start convert signal to the
corresponding valid output data.
To accommodate a bipolar signal swing, the ADS902 oper-
ates with a common-mode voltage (V
CM
) which is derived
from the external references. Due to the symmetric resistor
ladder inside the ADS902, the V
CM
is situated between the
top and bottom reference voltage. Equation (1) can be used
for calculating the common-mode voltage level.
V
CM
= (REFT +REFB)/2
(1)
At the same time, the two external reference voltages define
the full-scale input range for the ADS902. This makes it
possible for the input range to be adapted to the signal swing
of the front end.
APPLICATIONS
SIGNAL SWING AND COMMON-MODE
CONSIDERATIONS
The ADS902 is designed to operate on a +5V single supply
voltage. The nominal input signal swing is 1Vp-p, situated
between +2.25V and +3.25V. This means that the signal
swings
±
0.5V around a common-mode voltage of +2.75V.
In some applications it might be advantageous to increase
the input signal swing to 2Vp-p which will improve the
achievable ac-performance. However, consideration should
be given to keeping the signal swing within the linear region
of operation of the driving circuitry to avoid any excessive
distortion. In extreme situations, the performance of the
converter will start to degrade due to variations of the input’s
switch-on resistance over the input voltage. Therefore, the
Figure 4 depicts a circuit that can be used in single-supply
applications. The mid-reference voltage biases the op amp
up to the appropriate common-mode voltage, for example
V
CM
= +2.75V. With the use of capacitor C
G
the DC gain for
the non-inverting op amp input is set to +1V/V. As a result
the transfer function is modified to
V
OUT
= V
IN
{(1 + R
F
/R
G
) + V
CM
}
(3)
FIGURE 4. AC-Coupled, Single-Supply Interface Circuit.
402
OPA65x
V
IN
402
R
1
1k
V
CM
= +2.75V
C
1
0.1μF
0.1μF
IN
CM
+5V
R
S
10
–5V
+5V
ADS902
FIGURE 3. Typical AC-Coupled Interface Circuit. (Exter-
nal references not shown.)
R
1
1k
A
1
V
IN
R
F
V
CM
= +2.75V
C
1
0.1μF
0.1μF
IN
CM
+V
S
R
S
+5V
REFT
REFB
R
G
C
G
R
P(1)
22pF
ADS902
+3.25V
+2.25V
NOTE: (1) See text for discussion.
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