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參數(shù)資料
| 型號： | ADS900E |
| 英文描述： | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 219K |
| 代理商： | ADS900E |
8
ADS900
FIGURE 1. Input Track/Hold Configuration with Timing
Signals.
FIGURE 2. Pipeline A/D Architecture.
THEORY OF OPERATION
The ADS900 is a high speed sampling analog-to-digital
converter that utilizes a pipeline architecture. The fully
differential topology and digital error correction guarantee
10-bit resolution. The track/hold circuit is shown in Figure
1. The switches are controlled by an internal clock which has
a non-overlapping two phase signal,
φ
1 and
φ
2. At the
sampling time the input signal is sampled on the bottom
plates of the input capacitors. In the next clock phase,
φ
2, the
bottom plates of the input capacitors are connected together
and the feedback capacitors are switched to the op amp
output. At this time the charge redistributes between C
I
and
C
H
, completing one track/hold cycle. The differential output
is a held DC representation of the analog input at the sample
time. In the normal mode of operation, the complementary
input is tied to the common-mode voltage. In this case, the
track/hold circuit converts a single-ended input signal into a
fully differential signal for the quantizer. Consequently, the
input signal gets amplified by a gain or two, which improves
the signal-to-noise performance. Other parameters such as
small-signal and full-power bandwidth, and wideband noise
are also defined in this stage.
φ
1
φ
1
φ
2
φ
1
φ
1
φ
1
φ
1
φ
1
φ
2
φ
1
φ
2
φ
1
φ
2
IN
IN
(Opt.)
OUT
OUT
Op Amp
Bias
V
CM
Op Amp
Bias
V
CM
C
H
C
I
C
I
C
H
Input Clock (50%)
Internal Non-overlapping Clock
Σ
+
–
B1 (MSB)
B2
B3
B4
B5
B6
B7
B8
B9
B10 (LSB)
2-Bit
DAC
2-Bit
Flash
Input
T/H
Digital Delay
x2
x2
2-Bit
DAC
2-Bit
Flash
Digital Delay
2-Bit
Flash
Digital Delay
2-Bit
DAC
2-Bit
Flash
Digital Delay
x2
D
IN
IN
STAGE 1
STAGE 2
STAGE 8
STAGE 9
Σ
+
–
Σ
+
–
(Opt.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS901 | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS901E | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS902 | 10-Bit, 30MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS902E | 10-Bit, 30MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS930 | 8-Bit, 30MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS900E/1K | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS900E/1KG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS900EG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS901 | 制造商:BB 制造商全稱:BB 功能描述:10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS901E | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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