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參數(shù)資料
| 型號： | ADS900E |
| 英文描述： | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| 文件頁數(shù)： | 11/12頁 |
| 文件大小： | 219K |
| 代理商： | ADS900E |
11
ADS900
proper op amp should include its output swing, input com-
mon-mode range, and bias current. It should be noted that
any DC voltage difference between the inputs, IN and IN,
will show up as an offset at the output. At the same time an
offset adjustment can be accomplished.
INTERNAL REFERENCE
The ADS900 features an internal pipeline reference that
provides fixed reference voltages for the internal stages. As
shown in Figure 7 a buffer for each the top and bottom
reference is connected to the resistor ladder, which has a
nominal resistance of 4k
(
±
15%). The two outputs of the
buffers are brought out at pin 21 (LpBy) and pin 25 (LnBy),
primarily to connect external bypass capacitors, typically
0.1
μ
F, which will improve the performance. The buffers can
drive limited external loads, for example for level shifting of
the converter’s interface circuit, however, the current draw
should be limited to approximately 1mA.
Derived from the top reference of +1.75V is an additional
voltage of +1.0V. Note that this voltage, available on pin 23,
is not buffered and care should be taken when external loads
are applied. In normal operation, this pin is left unconnected
and no bypassing components are required.
CLOCK INPUT REQUIREMENTS
The clock input of the ADS900 is designed to accommodate
either +5V or +3V CMOS logic levels. To drive the clock
input with a minimum amount of duty cycle variation and
support maximum sampling rates (20Msps) high speed or
advanced CMOS logic should be used (HC/HCT, AC/ACT).
When digitizing at high sampling rates, a 50% duty cycle
along with fast rise and fall times (2ns or less) are recom-
mended to meet the rated performance specifications. How-
ever, the ADS900 performance is tolerant to duty cycle
variations of as much as
±
10% without degradation. For
applications operating with input frequencies up to Nyquist
or undersampling applications, special considerations must
be made to provide a clock with very low jitter. Clock jitter
leads to aperture jitter (t
A
) which can be the ultimate limita-
tion in achieving good SNR performance. Equation (4)
shows the relationship between aperture jitter, input fre-
quency and the signal-to-noise ratio:
SNR = 20log
10
[1/(2
π
f
IN
t
A
)]
For example, in the case of a 10MHz full-scale input signal
and an aperture jitter of t
A
= 20ps the SNR is clock jitter
limited to 58dB.
(4)
DIGITAL OUTPUTS
The digital outputs of the ADS900 are standard CMOS
stages and designed to be compatible to both high speed
TTL and CMOS logic families. The logic thresholds are for
low-voltage CMOS: V
OL
= 0.4V, V
OH
= 2.4V, which allows
the ADS900 to directly interface to 3V-logic. The digital
outputs of the ADS900 uses a dedicated digital supply pin
(pin 2, LV
DD
) see Figure 8. By adjusting the voltage on
LV
DD
, the digital output levels will vary respectively. It is
recommended to limit the fan-out to one to keep the capaci-
tive loading on the data lines below the specified 15pF. If
necessary, external buffers or latches may be used which
provide the added benefit of isolating the A/D converter
from any digital activities on the bus coupling back high
frequency noise and degrading the performance.
FIGURE 7. Internal Reference Structure and Recommended Reference Bypassing.
ADS900
2.8k
2k
2k
+1.75V
+1.25V
2.1k
0.1μF
REFT
REFB
LpBy
21
23
26
25
+1V
REF
0.1μF
LnBy
0.1μF
CM
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| ADS901 | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS901E | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS900E/1K | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS900E/1KG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS900EG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS901 | 制造商:BB 制造商全稱:BB 功能描述:10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS901E | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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