參數(shù)資料
型號： ADS8365IPAG
英文描述： 16-Bit, 250kSPS, 6-Channel, Simultaneous Sampling SAR ANALOG-TO-DIGITAL CONVERTERS
中文描述： 16位，AD7691的6通道同步采樣SAR類比數(shù)位轉換器
文件頁數(shù)： 24/33頁
文件大?。?/td> 441K
代理商： ADS8365IPAG
www.ti.com
RESET
EOC
RD
Register 5
Register 4
empty
empty
empty
empty
empty
empty
empty
empty
empty
empty
CH
A1
CH
A0
empty
empty
empty
empty
empty
CH
A1
empty
CH
C1
CH
C0
CH
B1
CH
B0
CH
A1
empty
empty
CH
C1
CH
C0
CH B1
CH
B0
CH
C1
CH
C0
CH
C1
CH
C0
CH
B1
CH
B0
Conversion
Channel A
Conversion
Channel C
Conversion
Channels B and C
t
0
t
2
t
3
t
4
t
5
t
6
Register 3
Register 2
Register 1
Register 0
t
1
The Output Code (DB15
…
DB0)
In the standard address mode (A2 A1 A0 =
000
…
101), the ADS8365 has a 16-bit output word
on pins DB15
…
DB0, if BYTE = 0. If BYTE = 1, then
two RD impulses are necessary to first read the
lower bits, and then the higher bits on either
DB7
…
DB0 or DB15...DB8.
If the ADS8365 operates in Cycle or in FIFO mode
and ADD is set high, then the address of the channel
(A2A1A0) and a data valid (DV) bit are added to the
data. If BYTE = 0, then the data valid and the
address of the channel is active during the first RD
impulse (1000 0000 0000 DV A2 A1 A0). During the
ADS8365
SBAS362A–AUGUST 2006–REVISED SEPTEMBER 2006
Figure 31. Functionality Diagram of the FIFO Registers
On t
5
, the new read process of channel A1 data is
finished. The new data of channel C0 and C1 at t
6
are put on top (registers 4 and 5).
second RD, the 16-bit data word can be read
(DB15
…
DB0). If BYTE = 1, then three RD impulses
are needed. On the first RD impulse, data valid, the
three address bits, and data bits DB3
…
DB0 (DV, A2,
A1, A0, DB3, DB2, DB1, DB0) are read, followed by
the
eight
lower
bits
of
(db7
…
db0), and finally the higher eight data bits
(DB15
…
DB8). 1000 0000 0000 is added before the
address in case BYTE = 0, and DB3
…
DB0 is added
after the address if BYTE = 1. This provides the
possibility to check if the counting of the RD signals
inside the ADS8365 are still tracking with the
external interface (see
Table 2
and
Table 3
).
In Cycle mode and in FIFO mode, the ADS8365
offers the ability to add the address of the channel to
the output data. Since there is only a 16-bit bus
available (or 8-bit bus in the case BYTE is high), an
additional
RD
signal
is
information (see
Table 2
and
Table 3
).
the
16-bit
data
word
necessary
to
get
the
In FIFO mode, a dummy read signal (RD) is required
after
a
reset
signal
to
appropriately; otherwise, the first conversion will not
be valid. This is only necessary in FIFO mode.
set
the
address
bits
The data valid bit is useful for the FIFO mode. Valid
data can simply be read until the data valid bit equals
0. The three address bits are listed in
Table 5
. If the
FIFO is empty, 16 zeroes are loaded to the output.
Table 5. Address Bit in the Output Data
DATA FROM ...
Channel A0
Channel A1
Channel B0
Channel B1
Channel C0
Channel C1
A2
0
0
0
0
1
1
A1
0
0
1
1
0
0
A0
0
1
0
1
0
1
24
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ADS8365IPAGG4 功能描述:模數(shù)轉換器 - ADC 16B 250kSPS 6Ch Simu Sampling SAR ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8365IPAGG-4 制造商:Texas Instruments 功能描述:IC, SM 16-BIT ADC 6CH SAR
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ADS8365IPAGRG4 功能描述:模數(shù)轉換器 - ADC 16B 250kSPS 6Ch Simu Sampling SAR ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8365M-EVM 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 ADC CONVERTER RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
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