- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄364641 > ADS8361 Dual, 500kSPS, 16-Bit, 2 + 2 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER PDF資料下載
參數(shù)資料
| 型號(hào)： | ADS8361 |
| 英文描述： | Dual, 500kSPS, 16-Bit, 2 + 2 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 雙路，500kSPS，16位，2通道，同步采樣模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 14/23頁 |
| 文件大?。?/td> | 444K |
| 代理商： | ADS8361 |
ADS8361
SBOS230C
14
www.ti.com
Mode II (M0 = 0, M1 = 1)
With M1 set to
‘
1
’
, the ADS8361 will output data on the
Serial Data A pin only. All other pins function in the same
manner as Mode I except that the Serial Data B output will
tri-state (i.e., high impedance) after a conversion following
M1 going HIGH. Another difference in this mode involves
the CONVST pin. Since it takes 40 clock cycles to output
the results from both A/D converters (rather than 20 when
M1 = 0), the ADS8361 will take 4
μ
s to complete a conver-
sion on both A/D converters (See Figure 11).
Mode III (M0 = 1, M1 = 0)
With M0 set to
‘
1
’
, the ADS8361 will cycle through Channels
0 and 1 sequentially (the A0 pin is ignored). At the same time,
setting M1 to
‘
0
’
places both Serial Outputs, A and B, in the
active mode (See Figure 12).
Mode IV (M0 = 1, M1 = 1)
Similar to Mode II, Mode IV uses the Serial A output line to
transmit data exclusively. Following the first conversion after
M1 goes HIGH, the serial B output will go into tri-state. See
Figure 13. As in Mode II, the second CONVST command is
always ignored when M1 = 1.
READING DATA
In all four timing diagrams, the CONVST pin and the RD pins
are tied together. If so desired, the two lines can be sepa-
rated. Data on the Serial Output pins (A and B) will become
valid following the third rising SCLK edge following RD rising
edge. Refer to Table III for data output format.
LAYOUT
For optimum performance, care should be taken with the
physical layout of the ADS8361 circuitry. This is particularly
true if the CLOCK input is approaching the maximum through-
put rate.
The basic SAR architecture is sensitive to glitches or sudden
changes on the power supply, reference, ground connec-
tions, and digital inputs that occur just prior to latching the
output of the analog comparator. Thus, driving any single
conversion for an n-bit SAR converter, there are n
“
windows
”
in which large external transient voltages can affect the
conversion result. Such glitches might originate from switch-
ing power supplies, nearby digital logic, or high power de-
vices. The degree of error in the digital output depends on
the reference voltage, layout, and the exact timing of the
external event. Their error can change if the external event
changes in time with respect to the CLOCK input.
With this in mind, power to the ADS8361 should be clean and
well bypassed. A 0.1
μ
F ceramic bypass capacitor should be
placed as close to the device as possible. In addition, a 1
μ
F
to 10
μ
F capacitor is recommended. If needed, an even larger
capacitor and a 5
or 10
series resistor may be used to
low-pass filter a noisy supply. On average, the ADS8361
draws very little current from an external reference as the
reference voltage is internally buffered. However, glitches
from the conversion process appear at the V
REF
input and the
reference source must be able to handle this. Whether the
reference is internal or external, the V
REF
pin should be
bypassed with a 0.1
μ
F capacitor. An additional larger capaci-
tor may also be used, if desired. If the reference voltage is
external and originates from an op amp, make sure that it can
drive the bypass capacitor or capacitors without oscillation.
No bypass capacitor is necessary when using the internal
reference (tie pin 10 directly to pin 11).
The GND pin should be connected to a clean ground point.
In many cases, this will be the
‘
analog
’
ground. Avoid
connections which are too near the grounding point of a
microcontroller or Digital Signal Processor (DSP). If required,
run a ground trace directly from the converter to the power-
supply entry point. The ideal layout will include an analog
ground plane dedicated to the converter and associated
analog circuitry.
APPLICATION INFORMATION
In Figures 14 through 17, different connection diagrams to
DSPs or microcontrollers are shown.
FIGURE 9. Conversion Mode.
CLOCK
CONVST
Cycle 1
Cycle 2
t
100ns
10ns
5ns
10ns
5ns
A
B
C
NOTE: All CONVST commands which occur more than 10ns before the falling edge before cycle
‘
1
’
of the external clock (Region
‘
A
’
) will initiate a conversion on the rising
edge of cycle
‘
1
’
. All CONVST commands which occur 5ns after the falling edge before cycle
‘
1
’
or 10ns before the falling edge before cycle 2 (Region
‘
B
’
) will initiate a
conversion on the rising edge of cycle
‘
2
’
. All CONVST commands which occur 5ns after the falling edge of cycle
‘
2
’
(Region
‘
C
’
) will initiate a conversion on the rising
edge of the next clock period. The CONVST pin should never be switched from LOW to HIGH in the region 10ns prior to the falling edge of the CLOCK and 5ns after the
falling edge (gray areas). If CONVST is toggled in this gray area, the conversion could begin on either the same rising edge of the CLOCK or the following edge.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS8361IRHBR | Dual, 500kSPS, 16-Bit, 2 + 2 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS8361IRHBT | Dual, 500kSPS, 16-Bit, 2 + 2 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS8361IDBQ | Dual, 500kSPS, 16-Bit, 2 + 2 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS8361IDBQR | TV 55C 55#22D PIN RECP |
| ADS8370 | 16-BIT, 600-kHz, PSEUDO-DIFFERENTIAL INPUT, MICROPOWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH SERIAL INTERFACE AND REFERENCE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS8361EVM | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADS8361 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| ADS8361IBDBQ | 制造商:Rochester Electronics LLC 功能描述:DUAL 250KHZ-16 BIT, 2+2 CHANNEL - Bulk 制造商:Texas Instruments 功能描述:DUAL 250KHZ-16 BIT, 2+2 CHANNEL - Rail/Tube |
| ADS8361IBDBQR | 制造商:Texas Instruments 功能描述:DUAL 250KHZ-16 BIT, 2+2 CHANNEL - Tape and Reel |
| ADS8361IDBQ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 500 kSPS 2 ADC 4ch ser out RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8361IDBQG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 500 kSPS 2 ADC 4ch ser out RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。