- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄375266 > ADS8343EB 16-Bit, 4-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER PDF資料下載
參數(shù)資料
| 型號(hào)： | ADS8343EB |
| 英文描述： | 16-Bit, 4-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 16位，4通道串行輸出采樣模擬到數(shù)字轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 13/18頁(yè) |
| 文件大?。?/td> | 446K |
| 代理商： | ADS8343EB |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)
ADS8343
SBAS183A
13
www.ti.com
Clock Modes
The ADS8343 can be used with an external serial clock or an
internal clock to perform the successive-approximation con-
version. In both clock modes, the external clock shifts data
in and out of the device. Internal clock mode is selected
when PD1 is HIGH and PD0 is LOW.
The
SGL/DIF
bit controls the multiplexer input mode: either
single-ended (HIGH) or differential (LOW). In single-ended
mode, the selected input channel is referenced to the COM
pin. In differential mode, the two selected inputs provide a
differential input. See Tables III and IV and Figure 5 for more
information. The last two bits (PD1-PD0) select the power-
down mode as shown in Table V. If both inputs are HIGH, the
device is always powered up. If both inputs are LOW, the
device enters a power-down mode between conversions.
When a new conversion is initiated, the device will resume
normal operation instantly
—
no delay is needed to allow the
device to power up and the very first conversion will be valid.
PD1
0
PD0
0
DESCRIPTION
Power-down between conversions. When each
conversion is finished, the converter enters a low-
power mode. At the start of the next conversion,
the device instantly powers up to full power. There
is no need for additional delays to assure full
operation and the very first conversion is valid.
Internal clock mode.
Reserved for future use.
No power-down between conversions, device al-
ways powered.
1
0
1
0
1
1
TABLE V. Power-Down Selection.
If the user decides to switch from one clock mode to the
other, an extra conversion cycle will be required before the
ADS8343 can switch to the new mode. The extra cycle is
required because the PD0 and PD1 control bits need to be
written to the ADS8343 prior to the change in clock modes.
NOTE: It is recommended that the customer write to the PD1
and PD0 registers prior to the first conversion in order to
insure that the proper clock mode is selected.
External Clock Mode
In external clock mode, the external clock not only shifts data
in and out of the ADS8343, it also controls the A/D conver-
sion steps. BUSY will go HIGH for one clock period after the
last bit of the control byte is shifted in. Successive-approxi-
mation bit decisions are made and appear at DOUT on each
of the next 16 SCLK falling edges, see Figure 6. Figure 7
shows the BUSY timing in external clock mode.
Since one clock cycle of the serial clock is consumed with
BUSY going HIGH (while the MSB decision is being made),
16 additional clocks must be given to clock out all 16 bits of
data; thus, one conversion takes a minimum of 25 clock
cycles to fully read the data. Since most microprocessors
communicate in 8-bit transfers, this means that an additional
transfer must be made to capture the LSB.
There are two ways of handling this requirement. One is
presented in Figure 6, where the beginning of the next
control byte appears at the same time the LSB is being
clocked out of the ADS8343. This method allows for maxi-
mum throughput and 24 clock cycles per conversion.
FIGURE 7. Detailed Timing Diagram.
PD0
t
BDV
t
DH
t
CH
t
CL
t
DS
t
CSS
t
DV
t
BD
t
BD
t
TR
t
BTR
t
D0
t
CSH
DCLK
CS
15
DOUT
BUSY
DIN
14
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS900 | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS900E | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS901 | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS901E | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| ADS902 | 10-Bit, 30MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS8343EB/2K5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 4-Ch Serial Output Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8343EB/2K5G4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 4-Ch Serial Output Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8343EBG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 4-Ch Serial Output Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8343EG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 4-Ch Serial Output Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8344 | 制造商:BB 制造商全稱:BB 功能描述:16-Bit, 8-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。