- 您現在的位置：買賣IC網 > PDF目錄375266 > ADS808 12-Bit, 70MHz Sampling ANALOG-TO-DIGITAL CONVERTER PDF資料下載
參數資料
| 型號： | ADS808 |
| 英文描述： | 12-Bit, 70MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 12位，70MHz的采樣模擬數字轉換器 |
| 文件頁數： | 14/19頁 |
| 文件大?。?/td> | 364K |
| 代理商： | ADS808 |
ADS808
SBAS179C
14
www.ti.com
undersampling). The following equation can be used to
calculate the achievable SNR for a given input frequency and
clock jitter (t
JA
in ps rms):
SNR
f t
π
=
(
)
20
1
2
10
log
Depending on the nature of the clock source
’
s output imped-
ance, an impedance matching might become necessary. For
this, a termination resistor (R
T
) may be installed, as shown in
Figure 12. To calculate the correct value for this resistor,
consider the impedance ratio of the selected transformer and
the differential clock input impedance of the ADS808, which
is approximately 5.4k
.
It is not recommended to employ any type of differential TTL
logic that suffers from mismatch in delay time and slew-rate
leading to performance degradation. Alternatively, a low jitter
ECL or PECL clock may be AC-coupled directly to the clock
inputs using small (0.1
μ
F) capacitors.
CLK
CLK
ADS808
1:1
R
T
RF Sine
Source
Output Enable (
OE
)
The digital outputs of the ADS808 can be set to high
impedance (tri-state), exercising the output enable pin (
OE
).
For normal operation, this pin must be at a logic LOW
potential, while a logic HIGH voltage disables the outputs.
Even though this function effects the output driver stage, the
threshold voltages for the
OE
pin do not depend on the
output driver supply (VDRV), but are fixed (see the Digital
Inputs of the Electrical Characteristics table). Operating the
OE
function dynamically (i.e., high speed multiplexing) should
be avoided, as it will corrupt the conversion process.
Power Down (PD)
A power-down of the ADS808 is initiated by taking the PD pin
HIGH. This shuts down portions within the converter and
reduces the power dissipation to about 20mW. The remain-
ing active blocks include the internal reference, ensuring a
fast reactivation time. During power-down, data in the con-
verter pipeline will be lost and new valid data will be subject
to the specified pipeline delay. In case the PD pin is not used,
it should be tied to ground or a logic LOW level.
Over-Range Indicator (OVR)
If the analog input voltage exceeds the full-scale range set by
the reference voltages, an over-range condition exists. The
ADS808 incorporates a function, that monitors the input volt-
age and detects any such out-of-range condition. The current
state can be read at the over-range indicator pin (OVR).
FIGURE 12. Applying a Sinusoidal Clock to the ADS808.
MINIMUM SAMPLING RATE
The pipeline architecture of the ADS808 uses the switched
capacitor technique in its internal track-and-hold stages. With
each clock cycle charges representing the captured signal
level are moved within the ADC pipeline core. The high
sampling speed necessitates the use of very small capacitor
values. In order to hold the droop errors LOW, the capacitors
require a minimum
“
refresh rate
”
. Therefore, the sampling
clock on the ADS808 should not drop below the specified
minimum of 1MHz.
DATA OUTPUT FORMAT (BTC)
The ADS808 makes two data output formats available, either
the
“
Straight Offset Binary
”
code (SOB) or the
“
Binary Two
’
s
Complement
”
code (BTC). The selection of the output coding
is controlled through the BTC pin. Applying a logic HIGH will
enable the BTC coding, while a logic LOW will enable the
SOB code. The BTC output format is widely used to interface
to microprocessors and such. The two code structures are
identical with the exception that the MSB is inverted for the
BTC format, as shown in Tables II and III.
SINGLE-ENDED
INPUT (IN)
(IN Biased to V
CM
)
+FS
–
1LSB
(
IN
= CMV + FSR/2)
+1/2 FS
Bipolar Zero
(IN = CMV)
–
1/2 FS
–
FS
(IN = CMV
–
FSR/2)
BINARY TWO
’
S
COMPLEMENT
(BTC)
STRAIGHT OFFSET
BINARY (SOB)
1111 1111 1111
0111 1111 1111
1100 0000 0000
1000 0000 0000
0100 0000 0000
0000 0000 0000
0100 0000 0000
0000 0000 0000
1100 0000 0000
1000 0000 0000
TABLE II. Coding Table for Single-Ended Input Configuration
with IN Tied to the Common-Mode Voltage (CMV).
STRAIGHT OFFSET
BINARY
(SOB)
BINARY TWO
’
S
COMPLEMENT
(BTC)
DIFFERENTIAL INPUT
+FS
–
1LSB
(IN = +3V,
IN
= +2V)
+1/2 FS
Bipolar Zero
(IN =
IN
= CMV)
–
1/2 FS
–
FS
(IN = +2V,
IN
= +3V)
1111 1111 1111
0111 1111 1111
1100 0000 0000
1000 0000 0000
0100 0000 0000
0000 0000 0000
0100 0000 0000
0000 0000 0000
1100 0000 0000
1000 0000 0000
TABLE III. Coding Table for Differential Input Configuration
and 2Vp-p Full-Scale Input Range.
相關PDF資料 |
PDF描述 |
|---|---|
| ADS809 | 12-Bit, 80MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS820 | 10-Bit, 20MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS820E | 10-Bit, 20MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS820U | 10-Bit, 20MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS821E | 10-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADS808Y/250 | 功能描述:模數轉換器 - ADC 12-Bit 70MHz Sampling ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS808Y/250G4 | 功能描述:模數轉換器 - ADC 12-Bit 70MHz Sampling ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS808Y/2K | 功能描述:模數轉換器 - ADC 12-Bit 70MHz Sampling ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS808Y/2KG4 | 功能描述:模數轉換器 - ADC 12-Bit 70MHz Sampling ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS809 | 制造商:BB 制造商全稱:BB 功能描述:12-Bit, 80MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
發(fā)布緊急采購，3分鐘左右您將得到回復。