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參數(shù)資料
| 型號： | ADS805 |
| 英文描述： | 12-Bit, 20MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 12位，20MHz的采樣模擬數(shù)字轉換器 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 260K |
| 代理商： | ADS805 |
8
ADS805
APPLICATION INFORMATION
DRIVING THE ANALOG INPUT
The ADS805 allows its analog inputs to be driven either
single-ended or differentially. The focus of the following
discussion is on the single-ended configuration. Typically,
its implementation is easier to achieve and the rated speci-
fications for the ADS805 are characterized using the single-
ended mode of operation.
AC-COUPLED INPUT CONFIGURATION
Given in Figure 1 is the circuit example of the most common
interface configuration for the ADS805. With the V
REF
pin
connected to the SEL pin, the full-scale input range is
defined to be 2Vp-p. This signal is ac-coupled in single-
ended form to the ADS805 using the low distortion voltage-
feedback amplifier OPA642. As is generally necessary for
single-supply components, operating the ADS805 with a
full-scale input signal swing requires a level-shift of the
amplifier’s zero centered analog signal to comply with the
A/D converter’s input range requirements. Using a DC
blocking capacitor between the output of the driving ampli-
fier and the converter’s input, a simple level-shifting scheme
can be implemented. In this configuration, the top and
bottom references (REFT, REFB) provide an output voltage
of +3V and +2V, respectively. Here, two resistor pairs (2 x
2k
) are used to create a common-mode voltage of approxi-
mately +2.5V to bias the inputs of the ADS805 (IN, IN) to
the required DC voltage.
An advantage of ac-coupling is that the driving amplifier
still operates with a ground-based signal swing. This will
keep the distortion performance at its optimum since the
signal swing stays within the linear region of the op amp and
sufficient headroom to the supply rails can be maintained.
Consider using the inverting gain configuration to eliminate
CMR induced errors of the amplifier. The addition of a small
series resistor (R
S
) between the output of the op amp and the
input of the ADS805 will be beneficial in almost all interface
configurations. This will decouple the op amp’s output from
the capacitive load and avoid gain peaking, which can result
in increased noise. For best spurious and distortion perfor-
mance, the resistor value should be kept below 100
.
Furthermore, the series resistor, together with the 100pF
capacitor, establish a passive low-pass filter, limiting the
bandwidth for the wideband noise, thus help improving the
signal-to-noise performance.
DC-COUPLED WITHOUT LEVEL SHIFT
In some applications the analog input signal may already be
biased at a level which complies with the selected input
range and reference level of the ADS805. In this case, it is
only necessary to provide an adequately low source imped-
ance to the selected input, IN or IN. Always consider
wideband op amps since their output impedance will stay
low over a wide range of frequencies.
DC-COUPLED WITH LEVEL SHIFT
Several applications may require that the bandwidth of the
signal path includes DC, in which case the signal has to be
DC-coupled to the A/D converter. In order to accomplish
this, the interface circuit has to provide a DC-level shift. The
circuit shown in Figure 2 utilizes the single-supply, current
feedback op amp OPA681 (A1), to sum the ground centered
input signal with a required DC offset. The ADS805 typi-
cally operates with a +2.5V common-mode voltage, which is
established with resistors R
3
and R
4
and connected to the IN
input of the converter. Amplifier A1 operates in inverting
configuration. Here, resistors R
1
and R
2
set the DC-bias
level for A1. Because of the op amp’s noise gain of +2V/V,
assuming R
F
= R
IN
, the DC offset voltage applied to its non-
inverting input has to be divided down to +1.25V, resulting
in a DC output voltage of +2.5V. DC voltage differences
between the IN and IN inputs of the ADS805 effectively will
produce an offset, which can be corrected for by adjusting
FIGURE 1. AC-Coupled Input Configuration for 2Vp-p Input Swing and Common-Mode Voltage at +2.5V Derived from
Internal Top and Bottom Reference.
OPA642
V
IN
+V
IN
0V
–V
IN
R
F
402
R
G
402
ADS805
R
S
24.9
2k
2k
2k
2k
+2.5V
100pF
0.1
μ
F
0.1
μ
F
2Vp-p
+5V –5V
IN
IN
(+2V)
REFB
(+1V)
V
REF
SEL
REFT
(+3V)
相關PDF資料 |
PDF描述 |
|---|---|
| ADS805E | 12-Bit, 20MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS805U | 12-Bit, 20MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS807 | 12-Bit, 53MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS807E | 12-Bit, 53MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS808 | 12-Bit, 70MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADS805E | 功能描述:模數(shù)轉換器 - ADC 12-Bit 20 MSPS Int/Ext Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS805E/1K | 功能描述:模數(shù)轉換器 - ADC 12-Bit 20 MSPS Int/Ext Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS805E/1KG4 | 功能描述:模數(shù)轉換器 - ADC 12-Bit 20 MSPS Int/Ext Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS805EG4 | 功能描述:模數(shù)轉換器 - ADC 12-Bit 20 MSPS Int/Ext Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS805U | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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