參數(shù)資料
型號(hào): ADS800U
英文描述: 12-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER
中文描述: 12位,40MHz的采樣模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 4/17頁(yè)
文件大小: 368K
代理商: ADS800U
ADS800
SBAS035B
4
www.ti.com
PIN CONFIGURATION
Top View
SO
PIN
DESIGNATOR
DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
GND
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
GND
+V
S
CLK
+V
S
OE
Ground
Bit 1, Most Significant Bit
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12, Least Significant Bit
Ground
+5V Power Supply
Convert Clock Input, 50% Duty Cycle
+5V Power Supply
HI: High Impedance State. LO or Floating: Nor-
mal Operation. Internal pull-down resistors.
Most Significant Bit Inversion, HI: MSB inverted
for complementary output. LO or Floating: Straight
output. Internal pull-down resistors.
+5V Power Supply
Bottom Reference Bypass. For external bypass-
ing of internal +1.25V reference.
Common-Mode Voltage. It is derived by (REFT +
REFB)/2.
Top Reference Bypass. For external bypassing
of internal +3.25V reference.
+5V Power Supply
Ground
Input
Complementary Input
Ground
19
MSBI
20
21
+V
S
REFB
22
CM
23
REFT
24
25
26
27
28
+V
S
GND
IN
IN
GND
PIN DESCRIPTIONS
GND
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
GND
GND
IN
IN
GND
+V
S
REFT
CM
REFB
+V
S
MSBI
OE
+V
S
CLK
+V
S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS800
TIMING DIAGRAM
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
CONV
t
L
t
H
t
D
t
1
t
2
Convert Clock Period
Clock Pulse LOW
Clock Pulse HIGH
Aperture Delay
Data Hold Time, C
L
= 0pF
New Data Delay Time, C
L
= 15pF max
25
12
12
(2)
100
μ
s
ns
ns
ns
ns
ns
ns
12.5
12.5
2
3.9
12.5
NOTES: (1)
(2) t
H
must be 13ns minimum if no missing codes is desired only for the conditions of t
CONV
28ns
and f
IN
< 2MHz.
indicates the portion of the waveform that will stretch out at slower sample rates.
Track
Hold
N
Hold
N + 1
Hold
N + 2
Hold
N + 3
Hold
N + 4
Hold
N + 5
Hold
N + 6
Track
Data Valid
N
7
Data Valid
N
6
Internal
Track-and-Hold
Convert
Clock
Output
Data
t
D
t
2
t
1
DATA LATENCY
(6.5 Clock Cycles)
t
CONV
t
L
t
H
Track
Track
Track
Track
N
3
N
5
N
4
N
2
N
1
N
Track
Track
Data Valid
N
8
(1)
Data Invalid
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