參數(shù)資料
型號： ADS7864YB/2K
廠商： Texas Instruments
文件頁數(shù)： 3/27頁
文件大?。?/td> 0K
描述： IC 12BIT 500KHZ 6CH A/D 48-TQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標準包裝： 2,000
位數(shù)： 12
采樣率（每秒）： 500k
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 50mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 12 個單端，雙極；6 個差分，雙極
配用： 296-30697-ND - EVAL MODULE FOR ADS7864M
www.ti.com
APPLICATIONS INFORMATION
INTRODUCTION
REFERENCE
ANALOG INPUT
SAMPLE-AND-HOLD SECTION
ADS7864
SingleEnded Input
Common
Voltage
V
REF to +VREF
peaktopeak
Differential Input
Common
Voltage
V
REF
peaktopeak
V
REF
peaktopeak
ADS7864
SBAS141A – SEPTEMBER 2000 – REVISED MARCH 2005
signal, is 5ns. The average delta of repeated aperture
delay values is typically 50ps (also known as aperture
jitter). These specifications reflect the ability of the
ADS7864 to capture AC input signals accurately at
The ADS7864 is a high speed, low power, dual 12-bit
the exact same moment in time.
analog-to-digital converter (ADC) that operates from a
single +5V supply. The input channels are fully
differential with a typical common-mode rejection of
80dB. The part contains dual 2s successive approxi-
Under normal operation, the REFOUT pin (pin 2)
mation ADCs, six differential sample-and-hold ampli-
should be directly connected to the REFIN pin (pin 1)
fiers, an internal +2.5V reference with REFIN and
to provide an internal +2.5V reference to the
REFOUT pins and a high speed parallel interface.
ADS7864. The ADS7864 can operate, however, with
There are six analog inputs that are grouped into
an external reference in the range of 1.2V to 2.6V for
three channels (A, B and C). Each A/D converter has
a corresponding full-scale range of 2.4V to 5.2V.
three inputs (A0/A1, B0/B1 and C0/C1) that can be
The
internal
reference
of
the
ADS7864
is
sampled and converted simultaneously, thus pre-
double-buffered. If the internal reference is used to
serving the relative phase information of the signals
drive an external load, a buffer is provided between
on both analog inputs. Each pair of channels has a
the reference and the load applied to pin 33 (the
hold signal (HOLDA, HOLDB, HOLDC) to allow
internal reference can typically source 2mA of cur-
simultaneous sampling on all six channels. The part
rent—load capacitance should not exceed 100pF). If
accepts an analog input voltage in the range of –VREF
an external reference is used, the second buffer
to +VREF, centered around the internal +2.5V refer-
provides isolation between the external reference and
ence. The part will also accept bipolar input ranges
the CDAC. This buffer is also used to recharge all of
when a level shift circuit is used at the front end (see
the capacitors of both CDACs during conversion.
A conversion is initiated on the ADS7864 by bringing
the HOLDX pin low for a minimum of 15ns. HOLDX
The analog input is bipolar and fully differential. There
low places both sample-and-hold amplifiers of the X
are two general methods of driving the analog input
channels in the hold state simultaneously and the
of the ADS7864: single-ended or differential (see
conversion process is started on both channels. The
Figure 19 and Figure 20). When the input is
BUSY output will then go low and remain low for the
single-ended, the –IN input is held at the com-
duration of the conversion cycle. The data can be
mon-mode voltage. The +IN input swings around the
read from the parallel output bus following the con-
same common voltage and the peak-to-peak ampli-
version by bringing both RD and CS low.
tude
is
the
(common-mode
+VREF)
and
the
Conversion time for the ADS7864 is 1.75s when an
(common-mode –VREF). The value of VREF determines
8MHz external clock is used. The corresponding
the range over which the common-mode voltage may
acquisition time is 0.25s. To achieve maximum
vary (see Figure 21).
output rate (500kHz), the read function can be
performed during at the start of the next conversion.
NOTE: This mode of operation is described in more
detail in the Timing and Control section of this data
sheet.
The sample-and-hold amplifiers on the ADS7864
allow the ADCs to accurately convert an input sine
wave of full-scale amplitude to 12-bit accuracy. The
input bandwidth of the sample-and-hold is greater
than the Nyquist rate of the ADC (Nyquist equals
one-half of the sampling rate) even when the ADC is
operated at its maximum throughput rate of 500kHz.
The
typical
small-signal
bandwidth
of
the
sample-and-hold amplifiers is 40MHz.
Typical aperture delay time, or the time it takes for
Figure 19. Methods of Driving the ADS7864
the ADS7864 to switch from the sample to the hold
Single-Ended or Differential
mode following the negative edge of the HOLDX
11
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參數(shù)描述
ADS7865 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual, 12-Bit, 3+3 or 2+2 Channel, Simultaneous Sampling Analog-to-Digital Converter
ADS7865I 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual, 12-Bit, 3+3 or 2+2 Channel, Simultaneous Sampling Analog-to-Digital Converter
ADS7865IBPBSR 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual, 12-Bit, 3+3 or 2+2 Channel, Simultaneous Sampling Analog-to-Digital Converter
ADS7865IPBS 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 2MSPS 12B Simul ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7865IPBSG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual,2MSPS,12B,2+2 Ch,ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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