參數(shù)資料
型號(hào): ADS7864YB/2K
廠商: Texas Instruments
文件頁(yè)數(shù): 13/27頁(yè)
文件大?。?/td> 0K
描述: IC 12BIT 500KHZ 6CH A/D 48-TQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 12
采樣率(每秒): 500k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 50mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類(lèi)型: 12 個(gè)單端,雙極;6 個(gè)差分,雙極
配用: 296-30697-ND - EVAL MODULE FOR ADS7864M
www.ti.com
LAYOUT
ADS7864
SBAS141A – SEPTEMBER 2000 – REVISED MARCH 2005
10F capacitor is recommended. If needed, an even
larger capacitor and a 5
or 10 series resistor may
For optimum performance, care should be taken with
be used to low-pass filter a noisy supply. On average,
the physical layout of the ADS7864 circuitry. This is
the ADS7864 draws very little current from an exter-
particularly true if the CLOCK input is approaching
nal reference as the reference voltage is internally
the maximum throughput rate. The basic SAR archi-
buffered. If the reference voltage is external and
tecture is sensitive to glitches or sudden changes on
originates from an op amp, make sure that it can
the power supply, reference, ground connections and
drive the bypass capacitor or capacitors without
digital inputs that occur just prior to latching the
oscillation. A bypass capacitor must not be used
output of the analog comparator. Thus, driving any
when using the internal reference (tie pin 33 directly
single conversion for an n-bit SAR converter, there
to pin 34). The AGND and DGND pins should be
are n 'windows' in which large external transient
connected to a clean ground point. In all cases, this
voltages can affect the conversion result. Such
should be the ‘a(chǎn)nalog’ ground. Avoid connections
glitches
might
originate
from
switching
power
which are too close to the grounding point of a
supplies, nearby digital logic or high power devices.
microcontroller or digital signal processor. If required,
The degree of error in the digital output depends on
run a ground trace directly from the converter to the
the reference voltage, layout, and the exact timing of
power supply entry point. The ideal layout will include
the external event. These errors can change if the
an analog ground plane dedicated to the converter
external event changes in time with respect to the
and associated analog circuitry.
CLOCK input. With this in mind, power to the
ADS7864 should be clean and well-bypassed. A
0.1F ceramic bypass capacitor should be placed as
close to the device as possible. In addition, a 1F to
20
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