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參數(shù)資料
型號: ADS7864Y/250G4
廠商: Texas Instruments
文件頁數(shù): 24/27頁
文件大?。?/td> 0K
描述: IC 12BIT 500KHZ 6CH ADC 48-TQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 250
位數(shù): 12
采樣率(每秒): 500k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 50mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 12 個單端,雙極;6 個差分,雙極
配用: 296-30697-ND - EVAL MODULE FOR ADS7864M
www.ti.com
ADS7864
SBAS141A – SEPTEMBER 2000 – REVISED MARCH 2005
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
+VA
Analog Power Supply. Normally +5V.
2
AGND
Analog Ground
3
DB15
Data Valid Output: ‘1’ for data valid; ‘0’ for invalid data.
4
DB14
Channel Address Output Pin (see Table 2)
5
DB13
Channel Address Output Pin (see Table 2)
6
DB12
Channel Address Output Pin (see Table 2)
7
DB11
Data Bit 11 - MSB
8
DB10
Data Bit 10
9
DB9
Data Bit 9
10
DB8
Data Bit 8
11
DB7
Data Bit 7
12
DB6
Data Bit 6
13
DB5
Data Bit 5
14
DB4
Data Bit 4
15
DB3
Data Bit 3
16
DB2
Data Bit 2
17
DB1
Data Bit 1
18
DB0
Data Bit 0 - LSB
19
BUSY
Low when a conversion is in progress.
20
DGND
Digital Ground
21
+VD
Digital Power Supply, +5VDC
22
CLOCK
An external clock must be applied to the CLOCK input.
23
RD
RD Input. Enables the parallel output when used in conjunction with chip select.
24
CS
Chip Select
25
HOLDC
Places Channels C0 and C1 in hold mode.
26
HOLDB
Places Channels B0 and B1 in hold mode.
27
HOLDA
Places Channels A0 and A1 in hold mode.
28
BYTE
2 × 8 Output Capability. Active high.
29
A2
A2 Address/Mode Select Pin (see Table 3).
30
A1
A1 Address/Mode Select Pin (see Table 3).
31
A0
A0 Address/Mode Select Pin (see Table 3).
32
RESET
Reset Pin
33
REFOUT
Reference Out
34
REFIN
Reference In
35
AGND
Analog Ground
36
+VA
Analog Power Supply. Normally +5V.
37
CH A1+
Noninverting Input Channel A1
38
CH A1–
Inverting Input Channel A1
39
CH B1+
Noninverting Input Channel B1
40
CH B1–
Inverting Input Channel B1
41
CH C1+
Noninverting Input Channel C1
42
CH C1–
Inverting Input Channel C1
43
CH C0–
Inverting Input Channel C0
44
CH C0+
Noninverting Input Channel C0
45
CH B0–
Inverting Input Channel B0
46
CH B0+
Noninverting Input Channel B0
47
CH A0–
Inverting Input Channel A0
48
CH A0+
Noninverting Input Channel A0
6
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