
8
ADS7862
REFERENCE
Under normal operation, the REF
OUT
pin (pin 2) should be
directly connected to the REF
IN
pin (pin 1) to provide an
internal +2.5V reference to the ADS7862. The ADS7862
can operate, however, with an external reference in the range
of 1.2V to 2.6V for a corresponding full-scale range of 2.4V
to 5.2V.
The internal reference of the ADS7862 is double-buffered.
If the internal reference is used to drive an external load, a
buffer is provided between the reference and the load ap-
plied to pin 2 (the internal reference can typically source
2mA of current—load capacitance should not exceed 100pF).
If an external reference is used, the second buffer provides
isolation between the external reference and the CDAC.
This buffer is also used to recharge all of the capacitors of
both CDACs during conversion.
ANALOG INPUT
The analog input is bipolar and fully differential. There are
two general methods of driving the analog input of the
ADS7862: single-ended or differential (see Figures 1 and 2).
When the input is single-ended, the –IN input is held at the
common-mode voltage. The +IN input swings around the
same common voltage and the peak-to-peak amplitude is the
(common-mode +V
REF
) and the (common-mode –V
REF
).
The value of V
REF
determines the range over which the
common-mode voltage may vary (see Figure 3).
When the input is differential, the amplitude of the input is the
difference between the +IN and –IN input, or: (+IN) – (–IN).
The peak-to-peak amplitude of each input is
±
1/2V
REF
around
this common voltage. However, since the inputs are 180
°
out
of phase, the peak-to-peak amplitude of the differential voltage
is +V
REF
to –V
REF
. The value of V
REF
also determines the
range of the voltage that may be common to both inputs (see
Figure 4).
INTRODUCTION
The ADS7862 is a high speed, low power, dual 12-bit A/D
converter that operates from a single +5V supply. The input
channels are fully differential with a typical common-mode
rejection of 80dB. The part contains dual 2
μ
s successive
approximation A/Ds, two differential sample-and-hold am-
plifiers, an internal +2.5V reference with REF
IN
and REF
OUT
pins and a high speed parallel interface. There are four
analog inputs that are grouped into two channels (A and B)
selected by the A0 input (A0 LOW selects Channels A0 and
B0, while A0 HIGH selects Channels A1 and B1). Each
A/D converter has two inputs (A0 and A1 and B0 and B1)
that can be sampled and converted simultaneously, thus
preserving the relative phase information of the signals on
both analog inputs. The part accepts an analog input voltage
in the range of –V
REF
to +V
REF
, centered around the internal
+2.5V reference. The part will also accept bipolar input
ranges when a level shift circuit is used at the front end (see
Figure 7).
A conversion is initiated on the ADS7862 by bringing the
CONVST pin LOW for a minimum of 15ns. CONVST
LOW places both sample-and-hold amplifiers in the hold
state simultaneously and the conversion process is started on
both channels. The BUSY output will then go HIGH and
remain HIGH for the duration of the conversion cycle.
Depending on the status of the A0 pin, the data will either
reflect a conversion of Channel 0 (A0 LOW) or Channel 1
(A0 HIGH). The data can be read from the parallel output
bus following the conversion by bringing both RD and CS
LOW.
Conversion time for the ADS7862 is 1.75
μ
s when an 8MHz
external clock is used. The corresponding acquisition time is
0.25
μ
s. To achieve maximum output rate (500kHz), the read
function can be performed immediately at the start of the
next conversion.
NOTE: This mode of operation is described in more detail
in the Timing and Control section of this data sheet.
SAMPLE-AND-HOLD SECTION
The sample-and-hold amplifiers on the ADS7862 allow the
A/Ds to accurately convert an input sine wave of full-scale
amplitude to 12-bit accuracy. The input bandwidth of the
sample-and-hold is greater than the Nyquist rate (Nyquist
equals one-half of the sampling rate) of the A/D even when
the A/D is operated at its maximum throughput rate of
500kHz. The typical small-signal bandwidth of the sample-
and-hold amplifiers is 40MHz.
Typical aperture delay time or the time it takes for the
ADS7862 to switch from the sample to the hold mode
following the CONVST pulse is 3.5ns. The average delta of
repeated aperture delay values is typically 50ps (also known
as aperture jitter). These specifications reflect the ability of
the ADS7862 to capture AC input signals accurately at the
exact same moment in time.
ADS7862
ADS7862
Single-Ended Input
Common
Voltage
–V
to +V
peak-to-peak
Differential Input
Common
Voltage
V
peak-to-peak
V
peak-to-peak
FIGURE 1. Methods of Driving the ADS7862 Single-Ended
or Differential.