參數(shù)資料
型號(hào)： ADS7862YB
英文描述： CMOS Hex Schmitt Triggers 14-PDIP -55 to 125
中文描述： 雙為500kHz，12位，2通道同步采樣模擬到數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 11/13頁
文件大?。?/td> 159K
代理商： ADS7862YB
11
ADS7862
FIGURE 9. Reading and Writing to the ADS7862 During the Same Cycle.
DESCRIPTION
ANALOG INPUT
Full-Scale Input Span
–V
REF
to +V
REF(1)
Least Significant
Bit (LSB)
(–V
REF
to +V
REF
)/4096
(2)
+Full Scale
4.99878V
0111 1111 1111
7FF
Midscale
2.5V
0000 0000 0000
000
Midscale – 1 LSB
2.49878V
1111 1111 1111
FFF
–Full Scale
0V
1000 0000 0000
800
NOTES: (1) –V
to +V
around V
. With a 2.5V reference, this corre-
sponds to a 0V to 5V input span. (2) 1.22mV with a 2.5V reference.
TABLE I. Ideal Input Voltages and Output Codes.
DIGITAL OUTPUT
BINARY TWO’S COMPLEMENT
BINARY CODE
HEX CODE
mode. Figure 9, in conjunction with Table I, shows the basic
read/write functions of the ADS7862 and highlights all of
the timing specifications. Figure 10 shows a more detailed
description of initiating a conversion using CONVST. Fig-
ure 11 illustrates three consecutive conversions and, with the
accompanying text, describes all of the read and write
capabilities of the ADS7862.
The Figure 11 timing diagram can be divided into three
sections: (a) initiating a conversion (n – 2), (b) starting a
second conversion (n – 1) while reading the data output from
the previous conversion (n – 2), and (c) starting a third
conversion (n) while reading both previous conversions
(n – 2 and n – 1). In this sequence, Channel 0 is converted
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
CONV
t
ACQ
t
CKP
t
CKL
t
CKH
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
t
F
t
R
Conversion Time
Acquisition Time
Clock Period
Clock LOW
Clock HIGH
CS to RD Setup Time
CS to RD Hold Time
CONVST LOW
RD Pulse Width
RD to Valid Data (Bus Access)
RD to HI-Z Delay (Bus Relinquish)
Time Between Conversion Reads
Address Setup Time
CONVST HIGH
Address Hold Time
CONVST to BUSY Propagation Delay
CONVST LOW Prior to CLOCK Rising Edge
CONVST LOW After CLOCK Rising Edge
Data Fall Time
Data Rise Time
1.75
0.25
5000
μ
s
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
125
40
40
0
0
15
30
16
10
25
20
40
250
20
20
30
10
5
13
20
25
30
TIMING SPECIFICATIONS
first followed by Channel 1. Channel 1 can be converted
prior to Channel 0 if the user wishes by simply starting the
conversion process with the A0 pin at logic HIGH (Channel
1) followed by logic LOW (Channel 0).
t
12
t
13
t
3
t
9
t
11
Conversion n
Conversion n – 1 Results
Conversion n Results
BUSY
A0
CS
RD
DATA
Conversion n + 1
1
CLOCK
CONVST
2
3
4
5
14
15
16
1
2
3
4
5
14
15
16
t
CONV
t
ACQ
t
8
t
4
t
10
t
1
t
5
CHA1
CHB1
CHA0
CHB0
t
6
t
2
t
7
相關(guān)PDF資料
PDF描述
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ADS7891 CMOS Hex Schmitt Triggers 14-SO -55 to 125
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS7862YB/250 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 500kHz 12-Bit 2+2 Ch Sim Smpl ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7862YB/250G4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 500kHz 12-Bit 2+2 Ch Sim Smpl ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7862YB/2K 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 500kHz 12-Bit 2+2 Ch Sim Smpl ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7862YB/2KG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 500kHz 12-Bit 2+2 Ch Sim Smpl ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7863 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual, 2MSPS, 12-Bit, 2 + 2 or 3 + 3 Channel, Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER
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