參數(shù)資料
型號(hào): ADS7843E
元件分類: 通用總線功能
英文描述: CMOS 8-Stage Presettable 8-Bit Binary Synchronous Down Counter 16-PDIP -55 to 125
中文描述: 觸摸屏控制器
文件頁(yè)數(shù): 9/12頁(yè)
文件大?。?/td> 163K
代理商: ADS7843E
9
ADS7843
1
DCLK
CS
8
1
11
DOUT
BUSY
S
DIN
CONTROL BITS
S
CONTROL BITS
10
9
8
7
6
5
4
3
2
1
0
11 10
9
8
1
1
8
single-ended mode, the converter’s reference voltage is
always the difference between the V
REF
and GND pins. In
differential mode, the reference voltage is the difference
between the currently enabled switches. See Tables I and II
and Figures 2 through 4 for more information. The last two
bits (PD1 - PD0) select the power- down mode as shown in
Table V. If both inputs are HIGH, the device is always
powered up. If both inputs are LOW, the device enters a
power-down mode between conversions. When a new con-
version is initiated, the device will resume normal operation
instantly—no delay is needed to allow the device to power
up and the very first conversion will be valid. There are two
power-down modes: one where PENIRQ is disabled and
one where it is enabled.
PD1
0
PD0
0
PENIRQ
Enabled
DESCRIPTION
Power-down between conversions. When each
conversion is finished, the converter enters a low
power mode. At the start of the next conversion,
the device instantly powers up to full power.
There is no need for additional delays to assure
full operation and the very first conversion is
valid. The Y– switch is on while in power-down.
0
1
Disabled
Same as mode 00, except PENIRQ is disabled.
The Y– switch is off while in power-down mode.
1
0
Disabled
Reserved for future use.
1
1
Disabled
No power-down between conversions, device is
always powered.
FIGURE 5. Conversion Timing, 24-Clocks per Conversion, 8-bit Bus Interface. No DCLK Delay Required with Dedicated
Serial Port.
t
ACQ
Acquire
Idle
Conversion
Idle
1
DCLK
CS
8
1
11
DOUT
BUSY
X/Y SWITCHES(1)
(SER/DFR HIGH)
X/Y SWITCHES(1, 2)
(SER/DFR LOW)
(MSB)
(START)
(LSB)
A2
S
ON
ON
OFF
OFF
OFF
OFF
DIN
A1
A0
MODEDFR
PD1 PD0
10
9
8
7
6
5
4
3
2
1
0
Zero Filled...
8
1
8
NOTES: (1) Y Drivers are on when X+ is selected input channel (A2 - A0 = 001
), X Drivers are on when Y+ is selected
input channel (A2 - A0 = 101
). Y– will turn on when power-down mode is entered and PD1, PD0 = 00
. (2) Drivers will
remain on if power-down mode is 11
B
(no power-down) until selected input channel, reference mode, or power-down
mode is changed.
TABLE V. Power-Down Selection.
FIGURE 6. Conversion Timing, 16-Clocks per Conversion, 8-bit Bus Interface. No DCLK Delay Required with Dedicated
Serial Port.
相關(guān)PDF資料
PDF描述
ADS7844 12-Bit, 8-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER
ADS7844E CMOS 8-Stage Presettable 8-Bit Binary Synchronous Down Counter 16-SO -55 to 125
ADS7844EB CMOS 8-Stage Presettable 8-Bit Binary Synchronous Down Counter 16-SO -55 to 125
ADS7844N 12-Bit, 8-Channel Serial Output Sampling ANALOG-TO-DIGITAL CONVERTER
ADS7844NB CMOS 8-Stage Presettable 8-Bit Binary Synchronous Down Counter 16-TSSOP -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADS7843E 制造商:Texas Instruments 功能描述:IC's
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