
9
ADS7821
INPUT RANGE
The ADS7821 offers a standard 0V to 5V input range.
Figure 6 shows the required circuit connections for the
ADS7821 with and without the gain adjustment hardware.
Adjustments for offset and gain are described in the calibra-
tion section of this data sheet.
CALIBRATION
The ADS7821 can be trimmed in hardware or software. There
is no external offset adjustment. If offset adjustment is re-
quired, an op amp featuring an offset trim pin should be used
to drive the ADS7821. The offset should be trimmed before
the gain since the offset directly affects the gain. To achieve
optimum performance, several iterations may be required.
GAIN ADJUSTMENT
To calibrate the gain of the ADS7821, a 576k
resistor can be
tied between the REF pin and a 50k
potentiometer as shown
in Figure 6a. The calibration range is
±
15mV for the gain.
REFERENCE
The ADS7821 can operate with its internal 2.5V reference or
an external reference. By applying an external reference to
pin 3, the internal reference can be bypassed. The reference
voltage at REF is buffered internally with the output on CAP
(pin 4).
REF
REF (pin 3) is an input for an external reference or the output
for the internal 2.5V reference. A 2.2
μ
F capacitor should be
connected as close to the REF pin as possible. The capacitor
and the output resistance of REF create a low pass filter to
bandlimit noise on the reference. Using a smaller value
capacitor will introduce more noise to the reference degrad-
ing the SNR and SINAD. The REF pin should not be used
to directly drive external loads.
The range for the external reference is 2.3V to 2.7V and
determines the actual LSB size. Increasing the reference
voltage will increase the full scale range and the LSB size of
the converter which can improve the SNR.
CAP
CAP (pin 4) is the output of the internal reference buffer. A
2.2
μ
F capacitor should be placed as close to the CAP pin as
possible to provide optimum switching currents for the
CDAC throughout the conversion cycle and compensation
for the output of the internal buffer. Using a capacitor any
smaller than 1
μ
F can cause the output buffer to oscillate and
may not have sufficient charge for the CDAC. Capacitor
values larger than 2.2
μ
F will have little affect on improving
performance.
The output of the buffer is capable of driving up to 2mA of
current to a static load. Static loads requiring more than 2mA
of current from the CAP pin will begin to degrade the
linearity of the ADS7821. Use of an external buffer is
recommended for loads requiring more than 2mA. Do not
attempt to directly drive any dynamic load with the output
voltage on CAP. This will cause performance degradation of
the converter.
a)
With Hardware
Gain Trim
b)
Without Hardware
Gain Trim
FIGURE 6. Circuit Diagram With and Without External Gain Trim.
1
2
3
4
5
AGND2
CAP
REF
AGND1
V
IN
+
2.2μF
0 to +5V
+
2.2μF
1
2
3
4
5
AGND2
NOTE: Use 1% metal film resistors.
CAP
REF
AGND1
V
IN
+
2.2μF
+5V
50k
576k
+
2.2μF
Gain
0 to +5V