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參數(shù)資料
| 型號： | ADS7821UB |
| 英文描述： | 16-Bit 10ms Sampling CMOS ANALOG-to-DIGITAL CONVERTER |
| 中文描述： | 16位10ms的采樣CMOS模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大小： | 280K |
| 代理商： | ADS7821UB |
7
ADS7821
READING DATA
The ADS7821 outputs full or byte-reading parallel data in
Straight Binary data output format. The parallel output will
be active when R/C (pin 24) is HIGH and CS (pin 25) is
LOW. Any other combination of CS and R/C will tri-state
the parallel output. Valid conversion data can be read in a
full parallel, 16-bit word or two 8-bit bytes on pins 6-13 and
pins 15-22. BYTE (pin 23) can be toggled to read both bytes
within one conversion cycle. Refer to Table III for ideal
output codes and Figure 2 for bit locations relative to the
state of BYTE.
PARALLEL OUTPUT (During a Conversion)
After conversion ‘n’ has been initiated, valid data from
conversion ‘n-1’ can be read and will be valid up to 5
μ
s after
the start of conversion ‘n’. Do not attempt to read data from
5
μ
s after the start of conversion ‘n’ until BUSY (pin 26)
goes HIGH; this may result in reading invalid data. Refer to
Table IV and Figures 3 through 5 for timing specifications.
Note!
For the best possible performance, data should not be
read during a conversion. The switching noise of the asyn-
chronous data transfer can cause digital feedthrough degrad-
ing the converter’s performance.
The number of control lines can be reduced by tying CS
LOW while using R/C to initiate conversions and activate
the output mode of the converter. See Figure 3.
DIGITAL OUTPUT
STRAIGHT BINARY
DESCRIPTION
ANALOG INPUT
BINARY CODE
HEX CODE
Full Scale Range
0 to +5V
Least Significant
Bit (LSB)
76
μ
V
Full Scale
4.999924V
1111 1111 1111 1111
FFFF
Midscale
2.5V
1000 0000 0000 0000
8000
One LSB below
Midscale
2.499924V
0111 1111 1111 1111
7FFF
Zero Scale
0V
0000 0000 0000 0000
0000
Table III. Ideal Input Voltages and Output Codes.
PARALLEL OUTPUT (After a Conversion)
After conversion ‘n’ is completed and the output registers
have been updated, BUSY (pin 26) will go HIGH. Valid data
from conversion ‘n’ will be available on D15-D0 (pin 6-13
and 15-22). BUSY going HIGH can be used to latch the
data. Refer to Table IV and Figures 3 through 5 for timing
specifications.
FIGURE 2. Bit Locations Relative to State of BYTE (pin 23).
Bit 0 (LSB)
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 15 (MSB)
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
6
7
8
9
10
11
12
13
14
23
22
21
20
19
18
17
16
15
ADS7821
BYTE LOW
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15 (MSB)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
6
7
8
9
10
11
12
13
14
23
22
21
20
19
18
17
16
15
ADS7821
BYTE HIGH
+5V
SYMBOL
DESCRIPTION
MIN
TYP
MAX UNITS
t
1
t
2
Convert Pulse Width
40
5000
ns
Data Valid Delay
after Start of Conversion
8
μ
s
t
3
BUSY Delay
from Start of Conversion
65
ns
t
4
t
5
BUSY LOW
8
μ
s
ns
BUSY Delay after
End of Conversion
220
t
6
t
7
t
8
t
9
t
10
t
11
Aperture Delay
40
ns
μ
s
μ
s
ns
Conversion Time
7.6
8
Acquisition Time
2
Bus Relinquish Time
10
35
83
BUSY Delay after Data Valid
50
200
ns
μ
s
Previous Data Valid
after Start of Conversion
5
t
7
+ t
6
t
12
t
13
t
14
Throughput Time
9
10
μ
s
ns
μ
s
ns
R/C to CS Setup Time
10
Time Between Conversions
10
Bus Access Time
and BYTE Delay
10
83
TABLE IV. Conversion Timing.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7822 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-Bit, High-Speed, 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7822B | 制造商:BB 制造商全稱:BB 功能描述:12-Bit High Speed 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7822C | 制造商:BB 制造商全稱:BB 功能描述:12-Bit High Speed 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7822CIDGKRAN | 制造商:Texas Instruments 功能描述: |
| ADS7822E | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-Bit, High-Speed, 2.7V microPower Sampling ANALOG-TO-DIGITAL CONVERTER |
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