參數(shù)資料
型號(hào)： ADS7812UBG4
廠商： Texas Instruments
文件頁(yè)數(shù)： 4/24頁(yè)
文件大小： 0K
描述： IC ADC 12BIT SER 40K 16SOIC
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 40
位數(shù)： 12
采樣率（每秒）： 40k
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 35mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC
包裝： 管件
輸入數(shù)目和類(lèi)型： 3 個(gè)單端，單極；3 個(gè)單端，雙極
ADS7812
12
SBAS042A
www.ti.com
External DATACLK Active After the Conversion
and During the Next Conversion
Figure 8 shows a method that is a hybrid of the two previous
approaches. This method works very well for microcontrollers
that do serial transfers 8 bits at a time and for slower
microcontrollers. For example, if the fastest serial clock that
the microcontroller can produce is 1
s, and two 8-bit trans-
fers must be used to obtain the serial data, the approach
shown in Figure 6 would result in a diminished throughput
(26kHz maximum conversion rate). The method described
in Figure 7 could not be used because time t25 would be
violated. The approach in Figure 8 results in an improved
throughput rate (33kHz maximum with a 1
s clock) and
DATACLK is LOW during t25.
COMPATIBILITY WITH THE ADS7813
The only difference between the ADS7812 and the ADS7813
is in the internal control logic and the digital interface. Since
the ADS7813 is a 16-bit converter, the internal shift register
is 16 bits wide. In addition, only 16-bit decisions are made
during the conversion. Thus, the ADS7813’s conversion
time is approximately 133% of the ADS7812’s.
The timing presented in this data sheet will allow as much
compatibility as possible with the ADS7813. The main
concern will be the different number of serial clocks. If a
design must be compatible with both the ADS7812 and
ADS7813, it is recommended to consider the ADS7813
first. If the design works with the ADS7813, it will certainly
work with the ADS7812. This is also true in regards to
layout (see the Layout section of this data sheet).
CHIP SELECT (CS)
The CS input allows the digital outputs of the ADS7812 to
be disabled and gates the external DATACLK signal when
EXT/INT is HIGH. See Figure 9 for the enable and disable
time associated with CS and Figure 3 for a block diagram of
the ADS7812’s logic. The digital outputs can be disabled at
any time.
Note that a conversion is initiated on the falling edge of CONV
even if CS is HIGH. If the EXT/INT input is LOW (internal
DATACLK) and CS is HIGH during the entire conversion, the
previous conversion result will be lost (the serial transmission
occurs but DATA and DATACLK are disabled).
TABLE IV. Complete List of Ideal Input Ranges.
ANALOG
CONNECT
INPUT
R1IN
R2IN
R3IN
IMPEDANCE
RANGE (V)
TO
(k
)
COMMENT
0.3125 to 2.8125
VIN
> 10,000
Specified offset and gain
–0.417 to 2.916
VIN
BUF
26.7
VIN cannot go below GND – 0.3V
0.417 to 3.750
VIN
GND
26.7
Offset and gain not specified
±3.333
VIN
BUF
VIN
21.3
Specified offset and gain
–15 to 5
VIN
BUF
45.7
Offset and gain not specified
±10
VIN
BUF
GND
45.7
Specified offset and gain
0.833 to 7.5
VIN
GND
VIN
21.3
Offset and gain not specified
–2.5 to 17.5
VIN
GND
BUF
45.7
Exceeds absolute maximum VIN
2.5 to 22.5
VIN
GND
45.7
Exceeds absolute maximum VIN
0 to 2.857
BUF
VIN
45.7
Offset and gain not specified
–1 to 3
BUF
VIN
BUF
21.3
VIN cannot go below GND – 0.3V
0 to 4
BUF
VIN
GND
21.3
Specified offset and gain
–6.25 to 3.75
BUF
VIN
26.7
Offset and gain not specified
0 to 10
BUF
GND
VIN
26.7
Specified offset and gain
0.357 to 3.214
GND
VIN
45.7
Offset and gain not specified
–0.5 to 3.5
GND
VIN
BUF
21.3
VIN cannot go below GND – 0.3V
0.5 to 4.5
GND
VIN
GND
21.3
Specified offset and gain
±5
GND
BUF
VIN
26.7
Specified offset and gain
1.25 to 11.25
GND
VIN
26.7
Offset and gain not specified
ANALOG INPUT
The ADS7812 offers a number of input ranges. This is
accomplished by connecting the three input resistors to
either the analog input (VIN), to ground (GND), or to the
2.5V reference buffer output (BUF). Table I shows the
input ranges that are typically used in data acquisition
applications. These ranges are all specified to meet the
specifications given in the Specifications table. Table IV
contains a complete list of ideal input ranges, associated
input connections, and comments regarding the range.
Active
HI-Z
BUSY, DATA,
DATACLK(1)
CS
t
27
t
26
NOTE: (1) DATACLK is an output only when EXT/INT is LOW.
FIGURE 9. Enable and Disable Timing for Digital Outputs.
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ADS7812UG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Pwr Serial 12B Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7813 制造商:BB 制造商全稱(chēng):BB 功能描述:Low-Power, Serial 16-Bit Sampling ANALOG-TO-DIGITAL CONVERTER
ADS7813P 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power Serial 16-Bit Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS7813P 制造商:Texas Instruments 功能描述:16BIT ADC SERIAL O/P 7813 PDIP16
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