參數(shù)資料
型號: ADS7811
英文描述: 16-Bit 250kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER
中文描述: 16位至250kHz采樣CMOS模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 6/9頁
文件大?。?/td> 186K
代理商: ADS7811
6
ADS7811
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V
IN
GND
REF
CAP
GND
D15
D14
D13
D12
D11
D10
D9
D8
GND
28
27
26
25
24
23
22
21
20
19
18
17
16
15
+V
S
+V
S
BUSY
CS
R/C
–V
S
D0
D1
D2
D3
D4
D5
D6
D7
ADS7811
R
1
75
+5V
–5V
+
2.2μF
C
4
0.1μF
C
6
+
2.2μF
C
3
0.1μF
C
5
Convert Pulse
74HC00
100ns min
3.3μs max
μProcessor
Bus
μProcessor
Bus
+5V
0.1μF
C
1
+
10μF
C
2
–5V
OC
0.1μF
C
7
+
10μF
C
8
2
3
4
5
6
7
8
9
1D
2D
3D
4D
5D
6D
7D
8D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
1
10
OC
CLK
74HC574
2
3
4
5
6
7
8
9
1D
2D
3D
4D
5D
6D
7D
8D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
1
10
OC
CLK
74HC574
R
2
10
OPA628
BASIC OPERATION
Figure 1 shows the recommended circuit for operation of the
ADS7811. A falling edge on the convert pulse signal places
the sample and hold into the hold mode and initiates a
conversion. When the conversion is complete, the pins D15
through D0 become active and the result of the conversion
is placed on these outputs. In the circuit shown in Figure 1,
the rising edge of BUSY latches the result into the 74HC574s.
After the conversion is complete, the ADS7811 sample and
hold returns to the sample mode and begins acquiring the
input signal for the next conversion. Allowing 4
μ
s between
falling edges of the convert pulse signal assures adequate
acquisition time for the internal sample and hold.
FIGURE 1. Basic Operation.
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