參數(shù)資料
型號(hào): ADS7807UE4
英文描述: Low-Power, 16-Bit, Sampling CMOS ANALOG-to-DIGITAL CONVERTER
中文描述: 低功耗,16位,采樣CMOS模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 3/24頁(yè)
文件大?。?/td> 534K
代理商: ADS7807UE4
ADS7807
SBAS022C
3
www.ti.com
ELECTRICAL CHARACTERISTICS
(Cont.)
At T
A
=
40
°
C to +85
°
C, f
S
= 40kHz, V
DIG
= V
ANA
= +5V, and using internal reference and fixed resistors (see Figure 7b), unless otherwise specified.
ADS7807P, U
ADS7807PB, UB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
AC ACCURACY
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise + Distortion)
f
IN
= 1kHz,
±
10V
f
IN
= 1kHz,
±
10V
f
IN
= 1kHz,
±
10V
60dB Input
f
IN
= 1kHz,
±
10V
90
100
100
88
30
88
130
600
96
32
dB
(6)
dB
dB
dB
dB
kHz
kHz
90
96
83
86
Signal-to-Noise
Usable Bandwidth
(7)
Full-Power Bandwidth (
3dB)
83
86
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Over-Voltage Recovery
(8)
40
20
ns
ps
μ
s
ns
FS Step
5
750
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
(Must use external buffer.)
Internal Reference Drift
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
No Load
2.48
2.5
1
2.52
V
μ
A
8
ppm/
°
C
V
2.3
2.5
2.7
External 2.5000V Ref
100
μ
A
DIGITAL INPUTS
Logic Levels
V
V
IL
I
IL
I
IH
0.3
+2.0
+0.8
V
V
μ
A
μ
A
V
D
+ 0.3V
±
10
±
10
V
IL
= 0V
V
IH
= 5V
DIGITAL OUTPUTS
Data Format
Data Coding
V
OL
V
Leakage Current
Parallel 16 bits in 2-bytes; Serial
Binary Two
s Complement or Straight Binary
I
SINK
= 1.6mA
I
SOURCE
= 500
μ
A
V
OUT
= 0V to V
DIG
+0.4
V
V
μ
A
+4
±
5
Output Capacitance
15
pF
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
R
L
= 3.3k
, C
L
= 50pF
R
L
= 3.3k
, C
L
= 10pF
83
83
ns
ns
POWER SUPPLIES
Specified Performance
V
DIG
V
ANA
I
DIG
I
Power Dissipation
Must be
V
ANA
+4.75
+4.75
+5
+5
0.6
5.0
28
23
50
+5.25
+5.25
V
V
mA
mA
mW
mW
μ
W
V
ANA
= V
= 5V, f
S
= 40kHz
REFD HIGH
PWRD and REFD HIGH
35
TEMPERATURE RANGE
Specified Performance
Derated Performance
Storage
Thermal Resistance (
θ
JA
)
DIP
SO
40
55
65
+85
+125
+150
°
C
°
C
°
C
75
75
°
C/W
°
C/W
Same specifications as ADS7807P, U.
NOTES: (1) LSB means Least Significant Bit. One LSB for the
±
10V input range is 305
μ
V. (2) Typical rms noise at worst-case transition. (3) As measured with
fixed resistors, see Figure 7b. Adjustable to zero with external potentiometer. (4) Full-scale error is the worst case of
Full-Scale or +Full-Scale untrimmed deviation
from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. (5) This is the
time delay after the ADS7807 is brought out of Power-Down mode until all internal settling occurs and the analog input is acquired to rated accuracy. A Convert
command after this delay will yield accurate results. (6) All specifications in dB are referred to a full-scale input. (7) Usable bandwidth defined as full-scale input
frequency at which Signal-to-(Noise + Distortion) degrades to 60dB. (8) Recovers to specified performance after 2
FS input overvoltage. (9) The minimum V
IH
level for the DATACLK signal is 3V.
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