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參數(shù)資料
| 型號： | ADS7806PB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PDIP28 |
| 封裝： | 0.300 INCH, GREEN, PLASTIC, DIP-28 |
| 文件頁數(shù)： | 9/25頁 |
| 文件大小： | 670K |
| 代理商： | ADS7806PB |
ADS7806
17
SBAS021B
www.ti.com
on the ADS7806 is approximately 5% to 10% of the amount
on similar A/D converters with the charge redistribution
Digital-to-Analog Converter (DAC) CDAC architecture. There
is also a resistive front end which attenuates any charge
which is released. The end result is a minimal requirement for
the drive capability on the signal conditioning preceding the
A/D converter. Any op amp sufficient for the signal in an
application will be sufficient to drive the ADS7806.
The resistive front end of the ADS7806 also provides a
specified
±25V over-voltage protection. In most cases, this
eliminates the need for external over-voltage protection cir-
cuitry.
INTERMEDIATE LATCHES
The ADS7806 does have tri-state outputs for the parallel
port, but intermediate latches should be used if the bus will
be active during conversions. If the bus is not active during
conversion, the tri-state outputs can be used to isolate the
A/D converter from other peripherals on the same bus.
Intermediate latches are beneficial on any monolithic A/D
converter. The ADS7806 has an internal LSB size of 610
V.
Transients from fast switching signals on the parallel port,
even when the A/D converter is tri-stated, can be coupled
through the substrate to the analog circuitry causing degra-
dation of converter performance. The effects of this phenom-
enon will be more obvious when using the pin-compatible
ADS7807 or any of the other 16-bit converters in the ADS
Family. This is due to the smaller internal LSB size of 38
V.
APPLICATIONS INFORMATION
QSPI INTERFACING
Figure 12 shows a simple interface between the ADS7806
and any QSPI equipped microcontroller. This interface as-
sumes that the convert pulse does not originate from the
microcontroller and that the ADS7806 is the only serial
peripheral.
Before enabling the QSPI interface, the microcontroller must
be configured to monitor the slave-select line. When a
transition from LOW to HIGH occurs on Slave Select (SS)
from BUSY (indicating the end of the current conversion), the
port can be enabled. If this is not done, the microcontroller
and the A/D converter may be “out-of-sync.”
Figure 13 shows another interface between the ADS7806
and a QSPI equipped microcontroller. The interface allows
the microcontroller to give the convert pulses while also
allowing multiple peripherals to be connected to the serial
bus. This interface and the following discussion assume a
master clock for the QSPI interface of 16.78MHz. Notice that
the serial data input of the microcontroller is tied to the MSB
(D7) of the ADS7806 instead of the serial output (SDATA).
Using D7 instead of the serial port offers tri-state capability
which allows other peripherals to be connected to the MISO
pin. When communication is desired with those peripherals,
PCS0 and PCS1 should be left HIGH; that will keep D7 tri-
stated and prevent a conversion from taking place.
In this configuration, the QSPI interface is actually set to do
two different serial transfers. The first, an 8-bit transfer,
causes PCS0 (R/C) and PCS1 (CS ) to go LOW, starting a
conversion. The second, a 12-bit transfer, causes only PCS1
(CS ) to go LOW. This is when the valid data will be trans-
ferred.
For both transfers, the DT register (delay after transfer) is
used to cause a 19
s delay. The interface is also set up to
wrap to the beginning of the queue. In this manner, the QSPI
is a state machine which generates the appropriate timing for
the ADS7806. This timing is thus locked to the crystal-based
timing of the microcontroller and not interrupt driven. So, this
interface is appropriate for both AC and DC measurements.
For the fastest conversion rate, the baud rate should be set to
2 (4.19MHz SCK), DT set to 10, the first serial transfer set to
eight bits, the second set to 12 bits, and DSCK disabled (in the
command control byte). This will allow for a 23kHz maximum
conversion rate. For slower rates, DT should be increased. Do
not slow SCK as this may increase the chance of affecting the
conversion results or accidently initiating a second conversion
during the first 8-bit transfer.
FIGURE 13. QSPI Interface to the ADS7806. Processor
Initiates Conversions.
FIGURE 12. QSPI Interface to the ADS7806.
R/C
BUSY
SDATA
DATACLK
CS
EXT/INT
BYTE
ADS7806
PCS0/SS
MOSI
SCK
QSPI
CPOL = 0 (Inactive State is LOW)
CPHA = 1 (Data valid on falling edge)
QSPI port is in slave mode.
Convert Pulse
R/C
CS
DATACLK
D7 (MSB)
BYTE
ADS7806
PCS0
PCS1
SCK
MISO
QSPI
CPOL = 0
CPHA = 0
EXT/INT
+5V
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7806PBG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power 12-Bit Sampling CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7806PG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power 12-Bit Sampling CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7806U | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power 12-Bit Sampling CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7806U | 制造商:Texas Instruments 功能描述:12BIT ADC LOW POWER SERIAL 7806 |
| ADS7806U/1K | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power 12-Bit Sampling CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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