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參數資料
| 型號： | ADS62P44IRGCRG4 |
| 廠商： | Texas Instruments |
| 文件頁數： | 66/78頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT SER/PAR 105M 64VQFN |
| 產品培訓模塊： | Data Converter Basics |
| 標準包裝： | 2,000 |
| 位數： | 14 |
| 采樣率（每秒）： | 105M |
| 數據接口： | 串行，并聯 |
| 轉換器數目： | 2 |
| 電壓電源： | 模擬和數字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 64-VQFN 裸露焊盤（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸入數目和類型： | 2 個差分，單極 |
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THD + 10Log
10 Ps
P
N
(ExpressedindBc)
DVSUP
DVOUT
10
PSRR=20Log
(ExpressedindBc)
DVCM
DVOUT
10
CMRR=20Log
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
Total Harmonic Distortion (THD)
– THD is the ratio of the power of the fundamental (PS) to the power of the
first nine harmonics (PD).
(9)
THD is typically given in units of dBc (dB to carrier).
Spurious-Free Dynamic Range (SFDR)
– The ratio of the power of the fundamental to the highest other
spectral component (either spur or harmonic). SFDR is typically given in units of dBc (dB to carrier).
Two-Tone Intermodulation Distortion
– IMD3 is the ratio of the power of the fundamental (at frequencies f1
and f2) to the power of the worst spectral component at either frequency 2f1
–f2 or 2f2–f1. IMD3 is either given in
units of dBc (dB to carrier) when the absolute power of the fundamental is used as the reference, or dBFS (dB to
full scale) when the power of the fundamental is extrapolated to the converter
’s full-scale range.
DC Power Supply Rejection Ratio (DC PSRR)
– The DC PSSR is the ratio of the change in offset error to a
change in analog supply voltage. The DC PSRR is typically given in units of mV/V.
AC Power Supply Rejection Ratio (AC PSRR)
– AC PSRR is the measure of rejection of variations in the
supply voltage by the ADC. If
ΔVsup is the change in supply voltage and ΔVout is the resultant change of the
ADC output code (referred to the input), then
(10)
Voltage Overload Recovery
– The number of clock cycles taken to recover to less than 1% error after an
overload on the analog inputs. This is tested by separately applying a sine wave signal with 6dB positive and
negative overload. The deviation of the first few samples after the overload (from their expected values) is noted.
Common Mode Rejection Ratio (CMRR)
– CMRR is the measure of rejection of variation in the analog input
common-mode by the ADC. If
ΔVcm_in is the change in the common-mode voltage of the input pins and ΔVout
is the resultant change of the ADC output code (referred to the input), then
(11)
Cross-Talk (only for multi-channel ADC)
– This is a measure of the internal coupling of a signal from adjacent
channel into the channel of interest. It is specified separately for coupling from the immediate neighboring
channel (near-channel) and for coupling from channel across the package (far-channel). It is usually measured
by applying a full-scale signal in the adjacent channel. Cross-talk is the ratio of the power of the coupling signal
(as measured at the output of the channel of interest) to the power of the signal applied at the adjacent channel
input. It is typically expressed in dBc.
Copyright
2007–2012, Texas Instruments Incorporated
69
Product Folder Link(s): ADS62P45, ADS62P44 ADS62P43, ADS62P42
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADS62P44IRGCT | 功能描述:模數轉換器 - ADC Dual 14B 105MSPS ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS62P44IRGCTG4 | 功能描述:模數轉換器 - ADC DUAL 14B 105MSPS Para ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS62P44RGC | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs |
| ADS62P45 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs |
| ADS62P45_08 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS |
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