參數(shù)資料
型號: ADS574JP
英文描述: Microprocessor-Compatible Sampling CMOS ANALOG-TO-DIGITAL CONVERTER
中文描述: 微處理器兼容采樣CMOS模擬數(shù)字轉換器
文件頁數(shù): 12/13頁
文件大小: 413K
代理商: ADS574JP
ADS574
12
POWER SUPPLY DECOUPLING
On the ADS574, +5V (to Pin 1) is the only power supply
required for correct operation. Pin 7 is not connected inter-
nally, so there is no problem in existing ADC574 sockets
where this is connected to +15V. Pin 11 (V
EE
) is only used
as a logic input to select modes of control over the sampling
function as described above. When used in an existing
ADC574 socket, the –15V on pin 11 selects the ADC574
Emulation Mode. Since pin 11 is used as a logic input, it is
immune to typical supply variations.
The +5V supply should be bypassed with a 10
μ
F tantalum
capacitor located close to the converter to promote noise-
free operations, as shown in Figure 2. Noise on the power
supply lines can degrade the converter’s performance. Noise
and spikes from a switching power supply are especially
troublesome.
RANGE CONNECTIONS
The ADS574 offers four standard input ranges: 0V to +10V,
0V to +20V,
±
5V, or
±
10V. Figures 10 and 11 show the
necessary connections for each of these ranges, along with
the optional gain and offset trim circuits. If a 10V input
range is required, the analog input signal should be con-
nected to pin 13 of the converter. A signal requiring a 20V
range is connected to pin 14. In either case the other pin of
the two is left unconnected. Pin 12 (Bipolar Offset) is
connected either to Pin 9 (Analog Common) for unipolar
operation, or to Pin 8 (2.5V Ref Out), or the external
reference, for bipolar operation. Full-scale and offset adjust-
ments are described below.
The input impedance of the ADS574 is typically 84k
in the
20V ranges and 21k
in the 10V ranges. This is signifi-
cantly higher than that of traditional ADC574 architectures,
reducing the load on the input source in most applications.
INPUT STRUCTURE
Figure 12 shows the resistor divider input structure of the
ADS574. Since the input is driving a capacitor in the CDAC
during acquisition, the input is looking into a high imped-
FIGURE 10. Unipolar Configuration.
FIGURE 11. Bipolar Configuration.
If the 10V analog input range is used (either bipolar or
unipolar), the 20V range input (pin 14) should be shielded
with ground plane to reduce noise pickup.
Coupling between analog input and digital lines should be
minimized by careful layout. For instance, if the lines must
cross, they should do so at right angles. Parallel analog and
digital lines should be separated from each other by a pattern
connected to common.
If external full scale and offset potentiometers are used, the
potentiometers and associated resistors should be as close as
possible to the ADS574.
100
10V
Range
Analog
Input
Analog
Common
Full-Scale Adjust
Ref In
Ref Out
Bipolar Offset
ADS574
10
8
12
13
14
9
20V
Range
Bipolar
Offset
Adjust
R
1
100
R
2
2.5V
FIGURE 12. ADS574 Input Structure.
Capacitor
Array
68k
34k
17k
10k
34k
Pin 12
Pin 13
Pin 14
20V Range
10V Range
Bipolar
Offset
100
100
Analog
Common
100k
100k
+V
CC
–V
CC
R
1
Unipolar
Offset
Adjust
Full-Scale
Adjust
Ref In
Ref Out
Bipolar Offset
ADS574
10
8
12
13
14
9
10V
Range
Analog
Input
20V
Range
R
2
2.5V
R
3
相關PDF資料
PDF描述
ADS574JU Microprocessor-Compatible Sampling CMOS ANALOG-TO-DIGITAL CONVERTER
ADS574JE Microprocessor-Compatible Sampling CMOS ANALOG-TO-DIGITAL CONVERTER
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ADS574KP Microprocessor-Compatible Sampling CMOS ANALOG-TO-DIGITAL CONVERTER
ADS574KU Microprocessor-Compatible Sampling CMOS ANALOG-TO-DIGITAL CONVERTER
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