- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375263 > ADS1271IPW 24 BIT WIDE BANDWIDTH ANALOG TO DIGITAL CONVERTER PDF資料下載
參數(shù)資料
| 型號： | ADS1271IPW |
| 元件分類： | ADC |
| 英文描述： | 24 BIT WIDE BANDWIDTH ANALOG TO DIGITAL CONVERTER |
| 中文描述： | 24位寬帶模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 19/29頁 |
| 文件大?。?/td> | 381K |
| 代理商： | ADS1271IPW |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
SBAS306A NOVEMBER 2004 REVISED DECEMBER 2004
www.ti.com
19
POWER-DOWN AND OFFSET CALIBRATION
In
SYNC/PDWN pin also serves as the control for
Power-Down mode and offset calibration. To enter this
mode, hold the SYNC/PDWN pin low for at least 2
19
CLK
periods. While in Power-Down mode, both the analog and
digital circuitry are completely deactivated. The digital
inputs are internally disabled so that is not necessary to
shut down CLK and SCLK. To exit Power-Down mode,
return SYNC/PDWN high on the rising edge of CLK.
addition
to
controlling
synchronization,
the
The ADS1271 uses a chopper-stabilized modulator to
provide inherently very low offset drift. To further minimize
offset, the ADS1271 automatically performs an offset
self-calibration when exiting Power-Down mode. When
power down completes, the offset self-calibration begins
with
the
inputs
AINP and AINN automatically
disconnected from the signal source and internally shorted
together. There is no need to modify the signal source
applied to the analog inputs during this calibration.
It is critical for the reference voltage to be stable when
exiting Power-Down mode; otherwise, the calibration will
be corrupted.
The offset self-calibration only removes offset errors internal
to the device, not offset errors due to external sources.
NOTE:
When an offset self-calibration is performed, the
resulting offset value will vary each time within the
peak-to-peak noise range of the converter. In High-Speed
mode, this is typically 178 LSBs.
The offset calibration value is cleared whenever the device
mode is changed (for example, from High-Speed mode to
High-Resolution mode).
When using the SPI format, DRDY will stay high after
exiting Power-Down mode while the digital filter settles, as
shown in Figure 46.
When using the Frame-Sync format, DOUT will stay low
after exiting Power-Down mode while the digital filter
settles, as shown in Figure 47.
Status
CLK
Converting
Sync
Power Down
Converting
PostCalibration
Data Ready
Offset Cal and Filter Settling
DRDY
SYNC/PDWN
t
PDWN
t
OFS
SYMBOL
t
PDWN
pulse width to enter PowerDown mode
2
19
CLK periods
Conversions
(1/f
DATA
)
t
OFS
Time for offset calibration and filter settling
256
MIN
TYP
MAX
UNITS
DESCRIPTION
SYNC/PDWN
Figure 46. Power-Down Timing for SPI format
SYMBOL
t
PDWN
pulse width to enter PowerDown mode
2
19
CLK periods
Conversions
(1/f
DATA
)
t
OFS
Time for offset calibration and filter settling
257
256
MIN
TYP
MAX
UNITS
DESCRIPTION
Status
CLK
FSYNC
DOUT
SYNC/PDWN
t
OFS
t
PDWN
Converting
Sync
Power Down
Converting
PostCalibration Data
Offset Cal and Filter Settling
SYNC/PDWN
Figure 47. Power-Down Timing for Frame-Sync Format
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS1271IPWR | 24 BIT WIDE BANDWIDTH ANALOG TO DIGITAL CONVERTER |
| ADS1271EVM-PDK | modular EVM form factor |
| ADS1271EVM | modular EVM form factor |
| ADS1601 | 16-BIT 1.25MSPS ANALOG TO DIGITAL CONVERTER |
| ADS1601IPFBR | 16-BIT 1.25MSPS ANALOG TO DIGITAL CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS1271IPWG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24-Bit 105kSPS Ind Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1271IPWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24-Bit 105kSPS Ind Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1271IPWRG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 24-Bit 105kSPS Ind Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1274 | 制造商:BB 制造商全稱:BB 功能描述:Quad/Octal, Simultaneous Sampling, 24-Bit Analog-to-Digital Converters |
| ADS1274EVM | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADS1274EVM Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。